Patents by Inventor Chihiro Okada

Chihiro Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11917312
    Abstract: Solid-state imaging apparatuses are disclosed. In one example, an apparatus includes a first substrate and a second substrate. The first substrate includes a pixel array that is arrayed in columns and rows. The second substrate is stacked on the first substrate, and includes first and second analog circuits that overlap with the pixel array in a third direction intersecting the column and row directions. A pixel divider section divides pixels in the array into a first area and a second area. The first and second analog circuits respectively connect to pixels in the first and second areas, and are adjacent to each other with a circuit divider section interposed therebetween, the circuit divider section being located with an overlap with the pixel divider section in the third direction.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: February 27, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Chihiro Okada, Luonghung Asakura, Kengo Iseki
  • Publication number: 20230283922
    Abstract: Solid-state imaging apparatuses are disclosed. In one example, an apparatus includes a first substrate and a second substrate. The first substrate includes a pixel array that is arrayed in columns and rows. The second substrate is stacked on the first substrate, and includes first and second analog circuits that overlap with the pixel array in a third direction intersecting the column and row directions. A pixel divider section divides pixels in the array into a first area and a second area. The first and second analog circuits respectively connect to pixels in the first and second areas, and are adjacent to each other with a circuit divider section interposed therebetween, the circuit divider section being located with an overlap with the pixel divider section in the third direction.
    Type: Application
    Filed: September 30, 2020
    Publication date: September 7, 2023
    Inventors: Chihiro Okada, Luonghung Asakura, Kengo Iseki
  • Patent number: 11523074
    Abstract: In a pixel array unit 11, pixels that generate pixel signals are arranged in a matrix. A control unit 17 performs reading of pixel signals in a first mode in which reading of the pixel signals is performed by thinning out lines from the pixel array unit 11, and reading of pixel signals in a second mode in which reading of the pixel signals is performed by including the lines thinned out in the first mode after the reading in the first mode. A signal processing unit 16 uses a pixel signal read in the first mode and a pixel signal read in the second mode, to set an amount of correction for a pixel of the lines thinned out in the first mode, on the basis of the pixel signal read in the second mode from a pixel in which reading of the pixel signal is performed in the first mode and the second mode, and corrects the pixel signal read in the second mode from the pixel of the lines thinned out in the first mode with the set amount of correction to reduce an influence of leakage light.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: December 6, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Luonghung Asakura, Chihiro Okada
  • Patent number: 11310450
    Abstract: In a solid-state imaging element in which an ADC is disposed, deterioration of conversion accuracy of the ADC caused by a dark current is inhibited. A signal voltage sample-and-hold circuit samples and holds, as a sample signal voltage, a voltage obtained by dividing a difference between a voltage of a vertical signal line corresponding to a light reception amount in a pixel and a predetermined variable reference voltage. An analog-to-digital converter converts an analog signal corresponding to the sample signal voltage to a digital signal. A reference voltage control section performs control to modulate a value of the variable reference voltage according to a dark current amount in the pixel.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: April 19, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Chihiro Okada, Kouji Matsuura
  • Publication number: 20220060643
    Abstract: In a pixel array unit 11, pixels that generate pixel signals are arranged in a matrix. A control unit 17 performs reading of pixel signals in a first mode in which reading of the pixel signals is performed by thinning out lines from the pixel array unit 11, and reading of pixel signals in a second mode in which reading of the pixel signals is performed by including the lines thinned out in the first mode after the reading in the first mode. A signal processing unit 16 uses a pixel signal read in the first mode and a pixel signal read in the second mode, to set an amount of correction for a pixel of the lines thinned out in the first mode, on the basis of the pixel signal read in the second mode from a pixel in which reading of the pixel signal is performed in the first mode and the second mode, and corrects the pixel signal read in the second mode from the pixel of the lines thinned out in the first mode with the set amount of correction to reduce an influence of leakage light.
    Type: Application
    Filed: September 17, 2019
    Publication date: February 24, 2022
    Inventors: LUONGHUNG ASAKURA, CHIHIRO OKADA
  • Patent number: 11252357
    Abstract: The present technology relates to an image-capturing device and an electronic apparatus that are capable of reducing kTC noise. A sample-hold unit that performs sampling and holding of a pixel signal, an analog-digital (AD) conversion unit that performs AD conversion of the pixel signal, and a setting unit that sets a transconductance of an operational amplifier included in the sample-hold unit to a transconductance where kTC noise is minimized are included. Alternatively, a sample-hold unit that performs sampling and holding of a pixel signal, a kTC cancellation unit that reduces kTC noise in the sample-hold unit, an analog-digital (AD) conversion unit that performs AD conversion of the pixel signal, and a setting unit that sets a capacitance value of a capacitor included in the kTC cancellation unit to a capacitance value where the kTC noise is minimized are included.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: February 15, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Chihiro Okada, Hiroaki Nishiya
  • Patent number: 11252355
    Abstract: The present technology relates to an image pickup device and an electronic device that enables a reduction in influence exerted by a dark current. The image pickup device and the electronic device include a sample and hold unit configured to perform sampling and holding of a pixel signal, an analog digital (AD) conversion unit configured to perform AD conversion of the pixel signal that includes a digit after a decimal point, a digital gain processing unit configured to apply a predetermined gain to a digital signal from the AD conversion unit, and a gain setting unit configured to set an analog gain of a column unit including the sample and hold unit and the AD conversion unit. The gain setting unit sets the analog gain in accordance with a measured dark current amount. The present technology can be applied, for example, to a CMOS image sensor.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: February 15, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Chihiro Okada, Hung Luong
  • Patent number: 11212477
    Abstract: To prevent generation of an invalid frame while suppressing power consumption. An image processing device including an ADC unit including a plurality of ADCs configured to convert a pixel signal read from an image sensor from an analog format to a digital format, and a selection unit configured to select the number of used ADCs, which is the number of ADCs used, among the plurality of ADCs on the basis of a decimation rate of pixels in reading of the pixel signal from the image sensor, in which the number of used ADCs and the decimation rate are switched such that a product of the number of used ADCs and the decimation rate is maintained to be a constant state.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: December 28, 2021
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Chihiro Okada
  • Publication number: 20210281784
    Abstract: In a solid-state imaging element in which an ADC is disposed, deterioration of conversion accuracy of the ADC caused by a dark current is inhibited. A signal voltage sample-and-hold circuit samples and holds, as a sample signal voltage, a voltage obtained by dividing a difference between a voltage of a vertical signal line corresponding to a light reception amount in a pixel and a predetermined variable reference voltage. An analog-to-digital converter converts an analog signal corresponding to the sample signal voltage to a digital signal. A reference voltage control section performs control to modulate a value of the variable reference voltage according to a dark current amount in the pixel.
    Type: Application
    Filed: April 15, 2019
    Publication date: September 9, 2021
    Inventors: CHIHIRO OKADA, KOUJI MATSUURA
  • Publication number: 20210160443
    Abstract: The present technology relates to an image pickup device and an electronic device that enables a reduction in influence exerted by a dark current. The image pickup device and the electronic device include a sample and hold unit configured to perform sampling and holding of a pixel signal, an analog digital (AD) conversion unit configured to perform AD conversion of the pixel signal that includes a digit after a decimal point, a digital gain processing unit configured to apply a predetermined gain to a digital signal from the AD conversion unit, and a gain setting unit configured to set an analog gain of a column unit including the sample and hold unit and the AD conversion unit. The gain setting unit sets the analog gain in accordance with a measured dark current amount. The present technology can be applied, for example, to a CMOS image sensor.
    Type: Application
    Filed: February 20, 2019
    Publication date: May 27, 2021
    Inventors: CHIHIRO OKADA, HUNG LUONG
  • Publication number: 20210044773
    Abstract: To prevent generation of an invalid frame while suppressing power consumption. An image processing device including an ADC unit including a plurality of ADCs configured to convert a pixel signal read from an image sensor from an analog format to a digital format, and a selection unit configured to select the number of used ADCs, which is the number of ADCs used, among the plurality of ADCs on the basis of a decimation rate of pixels in reading of the pixel signal from the image sensor, in which the number of used ADCs and the decimation rate are switched such that a product of the number of used ADCs and the decimation rate is maintained to be a constant state.
    Type: Application
    Filed: January 23, 2019
    Publication date: February 11, 2021
    Inventor: CHIHIRO OKADA
  • Publication number: 20200412987
    Abstract: The present technology relates to an image-capturing device and an electronic apparatus that are capable of reducing kTC noise. A sample-hold unit that performs sampling and holding of a pixel signal, an analog-digital (AD) conversion unit that performs AD conversion of the pixel signal, and a setting unit that sets a transconductance of an operational amplifier included in the sample-hold unit to a transconductance where kTC noise is minimized are included. Alternatively, a sample-hold unit that performs sampling and holding of a pixel signal, a kTC cancellation unit that reduces kTC noise in the sample-hold unit, an analog-digital (AD) conversion unit that performs AD conversion of the pixel signal, and a setting unit that sets a capacitance value of a capacitor included in the kTC cancellation unit to a capacitance value where the kTC noise is minimized are included. The present technology can be applied to a CMOS image sensor, for example.
    Type: Application
    Filed: February 20, 2019
    Publication date: December 31, 2020
    Inventors: CHIHIRO OKADA, HIROAKI NISHIYA
  • Patent number: 10009557
    Abstract: The present disclosure relates to an imaging element, a control method, a program, and an electronic device that can provide an electronic ND function by means of a simpler configuration. The imaging element includes a reference signal generation unit and an A/D conversion unit that includes a comparison unit and a switching unit that switches a capacitance connected to a terminal through which the pixel signal is inputted to the comparison unit and A/D-converts the pixel signal. In the case where the exposure time at the time when the image one frame before was captured is smaller than a prescribed first threshold, the switching unit is controlled so as to increase the capacitance connected to the terminal through which the pixel signal is inputted to the comparison unit. The present technology can be applied to a CMOS image sensor, for example.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: June 26, 2018
    Assignee: Sony Corporation
    Inventor: Chihiro Okada
  • Patent number: 9876978
    Abstract: The present disclosure relates to an imaging element, a gain control method, a program, and an electronic device that can capture an image with a high image quality or a high dynamic range with lower power consumption. The imaging element includes: an A/D conversion unit configured to A/D-convert a pixel signal outputted from a pixel; and a reference signal generation unit. The reference signal generation unit includes a prescribed number of pairs of transistors forming a current mirror circuit, and a switching unit configured to switch the number of transistors connected to the current mirror circuit. The switching unit is controlled so as to reduce the number of transistors connected to the current mirror circuit when the pixel signal is A/D-converted to a high gain. The present technology can be applied to a CMOS image sensor, for example.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: January 23, 2018
    Assignee: Sony Corporation
    Inventor: Chihiro Okada
  • Patent number: 9807328
    Abstract: Provided is an image sensor having a column ADC configuration including, for every pixel row, an analog digital converter (ADC) that converts a pixel signal including an analog signal generated by photoelectric conversion into an output signal including a digital signal. The image sensor includes a plurality of clamp operation units each configured to calculate a reference level based on each output signal of a plurality of ADC groups, and a reference voltage output unit configured to convert a digital signal of the reference level calculated by the clamp operation unit into a reference voltage including an analog signal, and supply the reference voltage to each the ADC that constitutes the ADC group.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: October 31, 2017
    Assignee: Sony Corporation
    Inventors: Chihiro Okada, Nobutaka Shimamura, Atsushi Suzuki
  • Publication number: 20170034467
    Abstract: The present disclosure relates to an imaging element, a gain control method, a program, and an electronic device that can capture an image with a high image quality or a high dynamic range with lower power consumption. The imaging element includes: an A/D conversion unit configured to A/D-convert a pixel signal outputted from a pixel; and a reference signal generation unit. The reference signal generation unit includes a prescribed number of pairs of transistors forming a current mirror circuit, and a switching unit configured to switch the number of transistors connected to the current mirror circuit. The switching unit is controlled so as to reduce the number of transistors connected to the current mirror circuit when the pixel signal is A/D-converted to a high gain. The present technology can be applied to a CMOS image sensor, for example.
    Type: Application
    Filed: April 3, 2015
    Publication date: February 2, 2017
    Inventor: Chihiro OKADA
  • Publication number: 20170034458
    Abstract: The present disclosure relates to an imaging element, a control method, a program, and an electronic device that can provide an electronic ND function by means of a simpler configuration. The imaging element includes a reference signal generation and an A/D conversion unit that includes a comparison unit and a switching unit that switches a capacitance connected to a terminal through which the pixel signal is inputted to the comparison unit and A/D-converts the pixel signal. In the case where the exposure time at the time when the image one frame before was captured is smaller than a prescribed first threshold, the switching unit is controlled so as to increase the capacitance connected to the terminal through which the pixel signal is inputted to the comparison unit. The present technology can be applied to a CMOS image sensor, for example.
    Type: Application
    Filed: April 3, 2015
    Publication date: February 2, 2017
    Inventor: Chihiro OKADA
  • Patent number: 9448238
    Abstract: A monoclonal antibody for detecting or capturing an exosome, selected from the group consisting of a monoclonal antibody or antibody fragments thereof that recognize amino acid numbers 113 to 195 of the amino acid sequence as shown in SEQ ID NO: 1, a monoclonal antibody or antibody fragments thereof that recognize amino acid numbers 104 to 202 of the amino acid sequence as shown in SEQ ID NO: 2, a monoclonal antibody or antibody fragments thereof that recognize amino acid numbers 36 to 54 of the amino acid sequence as shown in SEQ ID NO: 3, and a monoclonal antibody or antibody fragments thereof that recognize amino acid numbers 113 to 201 of the amino acid sequence as shown in SEQ ID NO: 3, each capable of detecting or capturing an exosome. The monoclonal antibody for detecting an exosome of the present invention is capable of detecting CD9, CD63 or CD81 on the exosome in a living body with an excellent sensitivity and specificity.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: September 20, 2016
    Assignee: COSMO BIO CO., LTD.
    Inventors: Hideki Ohta, Chihiro Okada, Tomi Murakami, Hiroyuki Okamoto, Hikaru Sonoda
  • Publication number: 20150281623
    Abstract: Provided is an image sensor having a column ADC configuration including, for every pixel row, an analog digital converter (ADC) that converts a pixel signal including an analog signal generated by photoelectric conversion into an output signal including a digital signal. The image sensor includes a plurality of clamp operation units each configured to calculate a reference level based on each output signal of a plurality of ADC groups, and a reference voltage output unit configured to convert a digital signal of the reference level calculated by the clamp operation unit into a reference voltage including an analog signal, and supply the reference voltage to each the ADC that constitutes the ADC group.
    Type: Application
    Filed: March 24, 2015
    Publication date: October 1, 2015
    Inventors: Chihiro Okada, Nobutaka Shimamura, Atsushi Suzuki
  • Publication number: 20150010913
    Abstract: A monoclonal antibody for detecting or capturing an exosome, selected from the group consisting of a monoclonal antibody or antibody fragments thereof that recognize amino acid numbers 113 to 195 of the amino acid sequence as shown in SEQ ID NO: 1, a monoclonal antibody or antibody fragments thereof that recognize amino acid numbers 104 to 202 of the amino acid sequence as shown in SEQ ID NO: 2, a monoclonal antibody or antibody fragments thereof that recognize amino acid numbers 36 to 54 of the amino acid sequence as shown in SEQ ID NO: 3, and a monoclonal antibody or antibody fragments thereof that recognize amino acid numbers 113 to 201 of the amino acid sequence as shown in SEQ ID NO: 3, each capable of detecting or capturing an exosome. The monoclonal antibody for detecting an exosome of the present invention is capable of detecting CD9, CD63 or CD81 on the exosome in a living body with an excellent sensitivity and specificity.
    Type: Application
    Filed: December 26, 2012
    Publication date: January 8, 2015
    Inventors: Hideki Ohta, Chihiro Okada, Tomi Murakami, Hiroyuki Okamoto, Hikaru Sonoda