Abstract: A molding material for light-reflecting bodies contains unsaturated polyester, cross-linking agent, and filler. The unsaturated polyester contains at least one of first unsaturated polyester having a fumaric acid residue and a 1,6-hexanediol residue, and second unsaturated polyester having a fumaric acid residue, a 1,4-butanediol residue, and a trimethylolpropane residue.

Abstract: A molding material for light-reflecting bodies contains unsaturated polyester, cross-linking agent, and filler. The unsaturated polyester contains at least one of first unsaturated polyester having a fumaric acid residue and a 1,6-hexanediol residue, and second unsaturated polyester having a fumaric acid residue, a 1,4-butanediol residue, and a trimethylolpropane residue.

Abstract: Disclosed herein are test control circuit, semiconductor memory device, and testing method embodiments for suppressing variations in test time while reducing the influence of a failed cell. An embodiment operates by performing a first verify of a cell selected in a predetermined order; storing an address of the cell when the first verify is a fail until the number of addresses is a predetermined number; applying a predetermined voltage to a plurality of cells of an erase unit when a next fail is determined in the first verify after the predetermined number of addresses have been stored; and performing a second verify to one or more cells indicated by the predetermined number of addresses, wherein the first verify is performed from a cell at the next fail according to the predetermined order after the second verify has finished.

Abstract: A nonvolatile semiconductor storage device includes an identification code generating circuit, a simultaneous write bit count calculation circuit, a write range calculation circuit, and a program pulse generating circuit. The identification code generating circuit generates an identification code to be assigned to every one of bits to be written, and the simultaneous write bit count calculation circuit calculates the number of bits to be written simultaneously, the number being equalized based on the generated identification code, within a range that does not exceed a maximum simultaneously writable bit number. The write range calculation circuit calculates a write range, based on the calculated number of bits to be written simultaneously, and the program pulse generating circuit generates a program pulse based on write data and on the generated identification code and the calculated write range.

Abstract: A nonvolatile semiconductor storage device includes an identification code generating circuit, a simultaneous write bit count calculation circuit, a write range calculation circuit, and a program pulse generating circuit. The identification code generating circuit generates an identification code to be assigned to every one of bits to be written, and the simultaneous write bit count calculation circuit calculates the number of bits to be written simultaneously, the number being equalized based on the generated identification code, within a range that does not exceed a maximum simultaneously writable bit number. The write range calculation circuit calculates a write range, based on the calculated number of bits to be written simultaneously, and the program pulse generating circuit generates a program pulse based on write data and on the generated identification code and the calculated write range.