Patents by Inventor Chiho KAWANABE
Chiho KAWANABE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10043913Abstract: A semiconductor device with favorable electrical characteristics is provided. In an oxide semiconductor film, a plurality of electron diffraction patterns are observed in such a manner that a surface over which the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm while the position of the film and the position of the electron beam are relatively moved. The electron diffraction patterns include 50 or more electron diffraction patterns observed in different areas. The sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%. The first electron diffraction patterns account for 50% or more. The first electron diffraction pattern includes observation points that are not symmetry or observation points disposed in a circular pattern. The second electron diffraction pattern includes observation points corresponding to the vertices of a hexagon.Type: GrantFiled: March 17, 2015Date of Patent: August 7, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Akihisa Shimomura, Yuhei Sato, Yasumasa Yamane, Shunpei Yamazaki, Kenichi Okazaki, Chiho Kawanabe
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Patent number: 10032928Abstract: Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.Type: GrantFiled: January 27, 2017Date of Patent: July 24, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Akihisa Shimomura, Yasumasa Yamane, Yuhei Sato, Takahisa Ishiyama, Kenichi Okazaki, Chiho Kawanabe, Masashi Oota, Noritaka Ishihara
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Patent number: 9780070Abstract: A first semiconductor substrate is used which has a structure in which a peeling layer is not formed in a section subjected to a first dividing treatment, so that the peeling layer is not exposed at the end surface of a second semiconductor substrate when the second semiconductor substrate is cut out of the first semiconductor substrate. In addition, a supporting material is provided on a layer to be peeled of the second semiconductor substrate before the second semiconductor substrate is subjected to a second dividing treatment.Type: GrantFiled: June 2, 2015Date of Patent: October 3, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Akihiro Chida, Yoshiaki Oikawa, Chiho Kawanabe
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Publication number: 20170141233Abstract: Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.Type: ApplicationFiled: January 27, 2017Publication date: May 18, 2017Inventors: Akihisa SHIMOMURA, Yasumasa YAMANE, Yuhei SATO, Takahisa ISHIYAMA, Kenichi OKAZAKI, Chiho KAWANABE, Masashi OOTA, Noritaka ISHIHARA
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Patent number: 9559174Abstract: Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.Type: GrantFiled: March 14, 2016Date of Patent: January 31, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Akihisa Shimomura, Yasumasa Yamane, Yuhei Sato, Takahisa Ishiyama, Kenichi Okazaki, Chiho Kawanabe, Masashi Oota, Noritaka Ishihara
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Patent number: 9406760Abstract: Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.Type: GrantFiled: February 19, 2015Date of Patent: August 2, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Akihisa Shimomura, Yasumasa Yamane, Yuhei Sato, Takahisa Ishiyama, Kenichi Okazaki, Chiho Kawanabe, Masashi Oota, Noritaka Ishihara
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Publication number: 20160197193Abstract: Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.Type: ApplicationFiled: March 14, 2016Publication date: July 7, 2016Inventors: Akihisa SHIMOMURA, Yasumasa YAMANE, Yuhei SATO, Takahisa ISHIYAMA, Kenichi OKAZAKI, Chiho KAWANABE, Masashi OOTA, Noritaka ISHIHARA
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Publication number: 20150333036Abstract: A first semiconductor substrate is used which has a structure in which a peeling layer is not formed in a section subjected to a first dividing treatment, so that the peeling layer is not exposed at the end surface of a second semiconductor substrate when the second semiconductor substrate is cut out of the first semiconductor substrate. In addition, a supporting material is provided on a layer to be peeled of the second semiconductor substrate before the second semiconductor substrate is subjected to a second dividing treatment.Type: ApplicationFiled: June 2, 2015Publication date: November 19, 2015Inventors: Akihiro CHIDA, Yoshiaki OIKAWA, Chiho KAWANABE
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Patent number: 9190428Abstract: A first semiconductor substrate is used which has a structure in which a peeling layer is not formed in a section subjected to a first dividing treatment, so that the peeling layer is not exposed at the end surface of a second semiconductor substrate when the second semiconductor substrate is cut out of the first semiconductor substrate. In addition, a supporting material is provided on a layer to be peeled of the second semiconductor substrate before the second semiconductor substrate is subjected to a second dividing treatment.Type: GrantFiled: May 13, 2014Date of Patent: November 17, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Akihiro Chida, Yoshiaki Oikawa, Chiho Kawanabe
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Publication number: 20150318359Abstract: A semiconductor device with favorable electrical characteristics is provided. In an oxide semiconductor film, a plurality of electron diffraction patterns are observed in such a manner that a surface over which the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm while the position of the film and the position of the electron beam are relatively moved. The electron diffraction patterns include 50 or more electron diffraction patterns observed in different areas. The sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%. The first electron diffraction patterns account for 50% or more. The first electron diffraction pattern includes observation points that are not symmetry or observation points disposed in a circular pattern. The second electron diffraction pattern includes observation points corresponding to the vertices of a hexagon.Type: ApplicationFiled: March 17, 2015Publication date: November 5, 2015Inventors: Akihisa SHIMOMURA, Yuhei SATO, Yasumasa YAMANE, Shunpei YAMAZAKI, Kenichi OKAZAKI, Chiho KAWANABE
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Publication number: 20150243738Abstract: Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.Type: ApplicationFiled: February 19, 2015Publication date: August 27, 2015Inventors: Akihisa SHIMOMURA, Yasumasa YAMANE, Yuhei SATO, Takahisa ISHIYAMA, Kenichi OKAZAKI, Chiho KAWANABE, Masashi OOTA, Noritaka ISHIHARA
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Publication number: 20140248744Abstract: Provided is a method for manufacturing a semiconductor device, which prevents waste generation from being caused peeling of films and prevents failure of peeling from being caused by waste due to peeling of films. A first semiconductor substrate is used which has a structure in which a peeling layer is not formed in a section subjected to a first dividing treatment, so that the peeling layer is not exposed at the end surface of a second semiconductor substrate when the second semiconductor substrate is cut out of the first semiconductor substrate. In addition, a supporting material is provided on a layer to be peeled of the second semiconductor substrate before the second semiconductor substrate is subjected to a second dividing treatment.Type: ApplicationFiled: May 13, 2014Publication date: September 4, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Akihiro CHIDA, Yoshiaki OIKAWA, Chiho KAWANABE
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Patent number: 8728868Abstract: Provided is a method for manufacturing a semiconductor device, which prevents waste generation from being caused peeling of films and prevents failure of peeling from being caused by waste due to peeling of films. A first semiconductor substrate is used which has a structure in which a peeling layer is not formed in a section subjected to a first dividing treatment, so that the peeling layer is not exposed at the end surface of a second semiconductor substrate when the second semiconductor substrate is cut out of the first semiconductor substrate. In addition, a supporting material is provided on a layer to be peeled of the second semiconductor substrate before the second semiconductor substrate is subjected to a second dividing treatment.Type: GrantFiled: August 8, 2013Date of Patent: May 20, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Akihiro Chida, Yoshiaki Oikawa, Chiho Kawanabe
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Publication number: 20130344681Abstract: Provided is a method for manufacturing a semiconductor device, which prevents waste generation from being caused peeling of films and prevents failure of peeling from being caused by waste due to peeling of films. A first semiconductor substrate is used which has a structure in which a peeling layer is not formed in a section subjected to a first dividing treatment, so that the peeling layer is not exposed at the end surface of a second semiconductor substrate when the second semiconductor substrate is cut out of the first semiconductor substrate. In addition, a supporting material is provided on a layer to be peeled of the second semiconductor substrate before the second semiconductor substrate is subjected to a second dividing treatment.Type: ApplicationFiled: August 8, 2013Publication date: December 26, 2013Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Akihiro CHIDA, Yoshiaki OIKAWA, Chiho KAWANABE
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Patent number: 8507322Abstract: Provided is a method for manufacturing a semiconductor device, which prevents waste generation from being caused peeling of films and prevents failure of peeling from being caused by waste due to peeling of films. A first semiconductor substrate is used which has a structure in which a peeling layer is not formed in a section subjected to a first dividing treatment, so that the peeling layer is not exposed at the end surface of a second semiconductor substrate when the second semiconductor substrate is cut out of the first semiconductor substrate. In addition, a supporting material is provided on a layer to be peeled of the second semiconductor substrate before the second semiconductor substrate is subjected to a second dividing treatment.Type: GrantFiled: June 21, 2011Date of Patent: August 13, 2013Inventors: Akihiro Chida, Yoshiaki Oikawa, Chiho Kawanabe
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Publication number: 20110318881Abstract: Provided is a method for manufacturing a semiconductor device, which prevents waste generation from being caused peeling of films and prevents failure of peeling from being caused by waste due to peeling of films. A first semiconductor substrate is used which has a structure in which a peeling layer is not formed in a section subjected to a first dividing treatment, so that the peeling layer is not exposed at the end surface of a second semiconductor substrate when the second semiconductor substrate is cut out of the first semiconductor substrate. In addition, a supporting material is provided on a layer to be peeled of the second semiconductor substrate before the second semiconductor substrate is subjected to a second dividing treatment.Type: ApplicationFiled: June 21, 2011Publication date: December 29, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Akihiro CHIDA, Yoshiaki OIKAWA, Chiho KAWANABE