Abstract: In an embodiment of the disclosed technology, a storage device starts in advance loading map data before outputting a signal corresponding to a read buffer command of a host device, encodes map data using a plurality of map load areas and a plurality of encoding areas, and provides encoded map data to the host device.

Abstract: A method includes receiving, at a first device via a first radio, a trigger from a second device, the first device configured for wireless communication using multiple radios sharing a clock, the multiple radios comprising the first radio and a second radio, the trigger including a timing indication. The method also includes determining, based on the timing indication in the trigger and a time of reception of the trigger, a timing of one or more operations of a radio of the second device for a discovery session between the first device and the second device. The method further includes starting the discovery session with the second device based on the determined timing of the one or more operations.

Abstract: A semiconductor device includes: a substrate; a plurality of memory cells positioned over the substrate, each of the plurality of memory cells having a multi-layer structure including a memory pattern; a sealing layer pattern filling a lower portion of a space between the memory cells, the lower portion being positioned below a bottom surface of the memory pattern; a liner layer pattern formed along a surface of an upper portion of the space to partially fill the upper portion; and a dielectric layer pattern filling a remaining portion of the space unfilled by the sealing layer pattern and the liner layer pattern.

Abstract: A semiconductor device is provided. The semiconductor device according to an implementation of the disclosed technology may include a variable resistance layer; a selector layer disposed over or under the variable resistance layer; a first protective layer disposed on sidewalls of the variable resistance layer and sidewalls of the selector layer, the first protective layer including silicon (Si) and nitrogen (N) and having a nitrogen (N) content higher than a silicon (Si) content; and a second protective layer disposed over the first protective layer, the second protective layer including silicon (Si) and nitrogen (N) and having a silicon (Si) content higher than a nitrogen (N) content.

Abstract: An electronic device includes a semiconductor memory. A method for fabricating the electronic device includes forming a first memory cell extending vertically from a surface of substrate and having a first upper portion that protrudes laterally, forming a second memory cell extending vertically from the surface of the substrate and having a second upper portion that protrudes laterally towards the first upper portion, and forming a liner layer over the first and second memory cells, the liner layer having a first portion disposed over the first upper portion and a second portion disposed over the second upper portion, the first and second portions of the liner layer contacting each other.

Abstract: An electronic device includes a semiconductor memory. A method for fabricating the electronic device includes forming a first memory cell extending vertically from a surface of substrate and having a first upper portion that protrudes laterally, forming a second memory cell extending vertically from the surface of the substrate and having a second upper portion that protrudes laterally towards the first upper portion, and forming a liner layer over the first and second memory cells, the liner layer having a first portion disposed over the first upper portion and a second portion disposed over the second upper portion, the first and second portions of the liner layer contacting each other.

Abstract: An electronic device includes a semiconductor memory. A method for fabricating the electronic device includes forming a first memory cell extending vertically from a surface of substrate and having a first upper portion that protrudes laterally, forming a second memory cell extending vertically from the surface of the substrate and having a second upper portion that protrudes laterally towards the first upper portion, and forming a liner layer over the first and second memory cells, the liner layer having a first portion disposed over the first upper portion and a second portion disposed over the second upper portion, the first and second portions of the liner layer contacting each other.

Abstract: This technology provides an electronic device and a method for fabricating the same. An electronic device in accordance with an implementation of this document may include a substrate including a first portion in a first region and a second portion in a second region; a plurality of memory cells disposed over the first portion of the substrate; a first insulating layer extending over the second portion of the substrate and at least partially filling a space between adjacent ones of the plurality of memory cells; and a second insulating layer disposed over the first insulating layer. The first insulating layer has a dielectric constant smaller than that of the second insulating layer, a thermal conductivity smaller than that of the second insulating layer, or both.

Abstract: In a method for fabricating an electronic device including a semiconductor memory, the method includes: forming stack structures, each of the stack structures including a variable resistance pattern; forming capping layers on the stack structures, the capping layers including an impurity; forming a gap fill layer between the stack structures; and removing the impurity from the capping layers and densifying the gap fill layer by irradiating the capping layers and the gap fill layer with ultraviolet light.

Abstract: This technology provides an electronic device and a method for fabricating the same. An electronic device in accordance with an implementation of this document may include a substrate including a first portion in a first region and a second portion in a second region; a plurality of memory cells disposed over the first portion of the substrate; a first insulating layer extending over the second portion of the substrate and at least partially filling a space between adjacent ones of the plurality of memory cells; and a second insulating layer disposed over the first insulating layer. The first insulating layer has a dielectric constant smaller than that of the second insulating layer, a thermal conductivity smaller than that of the second insulating layer, or both.

Abstract: An electronic device includes a semiconductor memory. A method for fabricating the electronic device includes forming a first memory cell extending vertically from a surface of substrate and having a first upper portion that protrudes laterally, forming a second memory cell extending vertically from the surface of the substrate and having a second upper portion that protrudes laterally towards the first upper portion, and forming a liner layer over the first and second memory cells, the liner layer having a first portion disposed over the first upper portion and a second portion disposed over the second upper portion, the first and second portions of the liner layer contacting each other.

Abstract: In a method for fabricating an electronic device including a semiconductor memory, the method includes: forming stack structures, each of the stack structures including a variable resistance pattern; forming capping layers on the stack structures, the capping layers including an impurity; forming a gap fill layer between the stack structures; and removing the impurity from the capping layers and densifying the gap fill layer by irradiating the capping layers and the gap fill layer with ultraviolet light.

Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a plurality of memory cells each including a variable resistance layer; a substituted dielectric layer filling a space between the plurality of memory cells; and an unsubstituted dielectric layer disposed adjacent to the variable resistance layer of each of the plurality of memory cells, wherein the unsubstituted dielectric layer may include a flowable dielectric material.

Abstract: In a method for fabricating an electronic device including a semiconductor memory, the method includes: forming stack structures, each of the stack structures including a variable resistance pattern; forming capping layers on the stack structures, the capping layers including an impurity; forming a gap fill layer between the stack structures; and removing the impurity from the capping layers and densifying the gap fill layer by irradiating the capping layers and the gap fill layer with ultraviolet light.

Abstract: An electronic device includes a semiconductor memory that includes: first and second lines spaced apart from each other and crossing each other; a third line spaced apart from the second line and crossing the second line; a first variable resistance element interposed between the first and second lines and overlapping an intersection of the first and second lines; a second variable resistance element interposed between the second and third lines and overlapping an intersection of the second and third lines, a part of the second variable resistance element generating a greater amount of heat than a part of the first variable resistance element when a current flows through the first variable resistance element in an opposite direction to a current flowing through the second variable resistance element; and a material layer serially connected with the second variable resistance element, disposed between the second and third lines, and exhibiting electrical resistance.

Abstract: An electronic device includes a semiconductor memory that includes: first and second lines spaced apart from each other and crossing each other; a third line spaced apart from the second line and crossing the second line; a first variable resistance element interposed between the first and second lines and overlapping an intersection of the first and second lines; a second variable resistance element interposed between the second and third lines and overlapping an intersection of the second and third lines, a part of the second variable resistance element generating a greater amount of heat than a part of the first variable resistance element when a current flows through the first variable resistance element in an opposite direction to a current flowing through the second variable resistance element; and a material layer serially connected with the second variable resistance element, disposed between the second and third lines, and exhibiting electrical resistance.

Abstract: In a method for fabricating an electronic device including a semiconductor memory, the method includes: forming stack structures, each of the stack structures including a variable resistance pattern; forming capping layers on the stack structures, the capping layers including an impurity; forming a gap fill layer between the stack structures; and removing the impurity from the capping layers and densifying the gap fill layer by irradiating the capping layers and the gap fill layer with ultraviolet light.

Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a plurality of memory cells each including a variable resistance layer; a substituted dielectric layer filling a space between the plurality of memory cells; and an unsubstituted dielectric layer disposed adjacent to the variable resistance layer of each of the plurality of memory cells, wherein the unsubstituted dielectric layer may include a flowable dielectric material.

Abstract: An electronic device may include a semiconductor memory. The semiconductor memory may include a trench formed in a substrate; a gate dielectric layer formed on a surface of the trench; a gate electrode which is formed on the gate dielectric layer, gap-fills a part of the trench, and contains dopants; a diffusion region which is formed to be in contact with the surface of the trench and to correspond to the gate electrode in the substrate; junction regions formed in the substrate at both sides of the trench; and a memory element coupled to a junction region in a side of the trench.

Abstract: A side curtain airbag for a vehicle includes an inner panel facing an interior of the vehicle, an outer panel facing the inner panel, a stopper chamber configured to prevent a head of an occupant seated on the vehicle from being moved toward a front side of the vehicle, a forward chamber arranged at a front side of the stopper chamber, and a rearward chamber arranged at a rear side of the stopper chamber. The forward chamber and the rearward chamber are arranged to be adjacent to each other such that in a non-inflation state of the airbag, a portion in which the stopper chamber is located is folded at least one time to form an overlapped portion.