Patents by Inventor Chiho Ogihara

Chiho Ogihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor package with lid bonded on wiring board and method of manufacturing the same
    Patent number: 8519529
    Abstract: A semiconductor apparatus includes: a wiring board; a lid; and gap filling resin. A semiconductor chip is mounted on the wiring board. The lid includes inlet portions for injecting resin. The semiconductor chip is covered with the lid on the wiring board. The gap filling resin bonds the wiring board and the lid inside the lid.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: August 27, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Chiho Ogihara
  • Method of manufacturing a substrate, substrate, device provided with a substrate, and determining method
    Patent number: 8309859
    Abstract: A substrate includes a base material, a first solder part disposed on a surface of the base material and used for connection to an electronic component, and a second solder part disposed on the surface of the base material and made of the same solder as that of the first solder part. The top surface of the first solder part is made to be a flat surface, and the maximum height of the second solder part from the surface of the base material is lower than the height of the flat surface of the first solder part from the surface of the base material. Thus, a substrate for which the kind of solder can be determined easily and with certainty, a device provided with this substrate, a method of manufacturing the substrate, and a determining method are provided.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: November 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Chiho Ogihara
  • SEMICONDUCTOR APPARATUS WITH LID BONDED ON WIRING BOARD AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20110169155
    Abstract: A semiconductor apparatus includes: a wiring board; a lid; and gap filling resin. A semiconductor chip is mounted on the wiring board. The lid includes inlet portions for injecting resin. The semiconductor chip is covered with the lid on the wiring board. The gap filling resin bonds the wiring board and the lid inside the lid.
    Type: Application
    Filed: January 11, 2011
    Publication date: July 14, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Chiho OGIHARA
  • Method of manufacturing a substrate, substrate, device provided with a substrate, and determining method
    Publication number: 20100035021
    Abstract: A substrate includes a base material, a first solder part disposed on a surface of the base material and used for connection to an electronic component, and a second solder part disposed on the surface of the base material and made of the same solder as that of the first solder part. The top surface of the first solder part is made to be a flat surface, and the maximum height of the second solder part from the surface of the base material is lower than the height of the flat surface of the first solder part from the surface of the base material. Thus, a substrate for which the kind of solder can be determined easily and with certainty, a device provided with this substrate, a method of manufacturing the substrate, and a determining method are provided.
    Type: Application
    Filed: August 5, 2009
    Publication date: February 11, 2010
    Applicant: NEC Electronics Corporation
    Inventor: Chiho Ogihara
  • Package substrate for a semiconductor device having thermoplastic resin layers and conductive patterns
    Patent number: 7378745
    Abstract: A plurality of film insulators having conductive patterns that are formed on surfaces and conductive vias that pass through the film insulators in the direction of thickness are stacked together and collectively subjected to pressure and heat to be formed as a single unit. On one outermost layer of the multilayer board that has been thus formed, a plurality of connection terminals are exposed to the outside, connection bumps of an LSI chip being secured to these connection terminals. On the outermost layer of the opposite side, a multiplicity of metal pads are provided, and a solder ball is secured on each metal pad to form a ball grid array (BGA) structure for connecting to a motherboard.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: May 27, 2008
    Assignees: NEC Electronics Corporation, Denso Corporation
    Inventors: Akimori Hayashi, Katsunobu Suzuki, Ryuichi Oikawa, Makoto Nakagoshi, Naoko Sera, Tadashi Murai, Chiho Ogihara, Ryohei Kataoka, Koji Kondo, Tomohiro Yokochi
  • Package substrate for a semiconductor device, a fabrication method for same, and a semiconductor device
    Publication number: 20060044735
    Abstract: A plurality of film insulators having conductive patterns that are formed on surfaces and conductive vias that pass through the film insulators in the direction of thickness are stacked together and collectively subjected to pressure and heat to be formed as a single unit. On one outermost layer of the multilayer board that has been thus formed, a plurality of connection terminals are exposed to the outside, connection bumps of an LSI chip being secured to these connection terminals. On the outermost layer of the opposite side, a multiplicity of metal pads are provided, and a solder ball is secured on each metal pad to form a ball grid array (BGA) structure for connecting to a motherboard.
    Type: Application
    Filed: August 30, 2005
    Publication date: March 2, 2006
    Applicants: NEC ELECTRONICS CORPORATION, DENSO CORPORATION
    Inventors: Akimori Hayashi, Katsunobu Suzuki, Ryuichi Oikawa, Makoto Nakagoshi, Naoko Sera, Tadashi Murai, Chiho Ogihara, Ryohei Kataoka, Koji Kondo, Tomohiro Yokochi