Patents by Inventor Chihoko AKIYAMA
Chihoko AKIYAMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11749622Abstract: A field effect transistor includes: a semiconductor region including a first inactive region, an active region, and a second inactive region arranged side by side in a first direction; a gate electrode, a source electrode, and a drain electrode on the active region; a gate pad on the first inactive region; a gate guard on and in contact with the semiconductor region, the gate guard being apart from the gate pad and located between an edge on the first inactive region side of the semiconductor region and the gate pad; a drain pad on the second inactive region; a drain guard on and in contact with the semiconductor region, the drain guard being apart from the drain pad and located between an edge on the second inactive region side of the semiconductor region and the drain pad; and a metal film electrically connected to the gate guard.Type: GrantFiled: June 30, 2021Date of Patent: September 5, 2023Assignee: SUMITOMO DEVICE INNOVATIONS, INC.Inventor: Chihoko Akiyama
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Publication number: 20210327827Abstract: A field effect transistor includes: a semiconductor region including a first inactive region, an active region, and a second inactive region arranged side by side in a first direction; a gate electrode, a source electrode, and a drain electrode on the active region; a gate pad on the first inactive region; a gate guard on and in contact with the semiconductor region, the gate guard being apart from the gate pad and located between an edge on the first inactive region side of the semiconductor region and the gate pad; a drain pad on the second inactive region; a drain guard on and in contact with the semiconductor region, the drain guard being apart from the drain pad and located between an edge on the second inactive region side of the semiconductor region and the drain pad; and a metal film electrically connected to the gate guard.Type: ApplicationFiled: June 30, 2021Publication date: October 21, 2021Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventor: Chihoko AKIYAMA
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Patent number: 11081452Abstract: A field effect transistor includes: a semiconductor region including a first inactive region, an active region, and a second inactive region arranged side by side in a first direction; a gate electrode, a source electrode, and a drain electrode on the active region; a gate pad on the first inactive region; a gate guard on and in contact with the semiconductor region, the gate guard being apart from the gate pad and located between an edge on the first inactive region side of the semiconductor region and the gate pad; a drain pad on the second inactive region; a drain guard on and in contact with the semiconductor region, the drain guard being apart from the drain pad and located between an edge on the second inactive region side of the semiconductor region and the drain pad; and a metal film electrically connected to the gate guard.Type: GrantFiled: February 26, 2020Date of Patent: August 3, 2021Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventor: Chihoko Akiyama
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Publication number: 20210104610Abstract: A semiconductor device includes a substrate, an active region and an inactive region surrounding the active region, a gate electrode, a drain electrode and a source electrode on the active region, a drain interconnection including a drain finger and a drain bar, and a source interconnection including a source finger and a source bar. The source bar is located on an opposite side of the drain bar across the active region in a first direction. The source electrode includes a first side facing the drain bar in the first direction and a first depression in a middle of the first side. A first depth of the first depression in the first direction is equal or more than a first interval between the drain bar and the first side in the first direction.Type: ApplicationFiled: December 16, 2020Publication date: April 8, 2021Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventor: Chihoko AKIYAMA
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Patent number: 10903323Abstract: A semiconductor device includes a substrate, an active region and an inactive region surrounding the active region, a gate electrode, a drain electrode and a source electrode on the active region, a drain interconnection including a drain finger and a drain bar, and a source interconnection including a source finger and a source bar. The source bar is located on an opposite side of the drain bar across the active region in a first direction. The source electrode includes a first side facing the drain bar in the first direction and a first depression in a middle of the first side. A first depth of the first depression in the first direction is equal or more than a first interval between the drain bar and the first side in the first direction.Type: GrantFiled: September 5, 2019Date of Patent: January 26, 2021Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventor: Chihoko Akiyama
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Publication number: 20200279818Abstract: A field effect transistor includes: a semiconductor region including a first inactive region, an active region, and a second inactive region arranged side by side in a first direction; a gate electrode, a source electrode, and a drain electrode on the active region; a gate pad on the first inactive region; a gate guard on and in contact with the semiconductor region, the gate guard being apart from the gate pad and located between an edge on the first inactive region side of the semiconductor region and the gate pad; a drain pad on the second inactive region; a drain guard on and in contact with the semiconductor region, the drain guard being apart from the drain pad and located between an edge on the second inactive region side of the semiconductor region and the drain pad; and a metal film electrically connected to the gate guard.Type: ApplicationFiled: February 26, 2020Publication date: September 3, 2020Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventor: Chihoko AKIYAMA
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Publication number: 20200091302Abstract: A semiconductor device includes a substrate, an active region and an inactive region surrounding the active region, a gate electrode, a drain electrode and a source electrode on the active region, a drain interconnection including a drain finger and a drain bar, and a source interconnection including a source finger and a source bar. The source bar is located on an opposite side of the drain bar across the active region in a first direction. The source electrode includes a first side facing the drain bar in the first direction and a first depression in a middle of the first side. A first depth of the first depression in the first direction is equal or more than a first interval between the drain bar and the first side in the first direction.Type: ApplicationFiled: September 5, 2019Publication date: March 19, 2020Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventor: Chihoko AKIYAMA