Patents by Inventor Chii-Ming Morris Wu

Chii-Ming Morris Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8354734
    Abstract: A crack prevention ring at the exterior edge of an integrated circuit prevents delamination and cracking during the separation of the integrated circuits into individual die. The crack prevention ring extends vertically into a semiconductor workpiece to at least a metallization layer of the integrated circuit. The crack prevention ring may be formed simultaneously with the formation of test pads of the integrated circuits. The crack prevention ring may be partially or completely filled with conductive material. An air pocket may be formed within the crack prevention ring beneath a passivation layer of the integrated circuit. The crack prevention ring may be removed during the singulation process.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: January 15, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Wei Wang, Chii-Ming Morris Wu
  • Publication number: 20090289325
    Abstract: A crack prevention ring at the exterior edge of an integrated circuit prevents delamination and cracking during the separation of the integrated circuits into individual die. The crack prevention ring extends vertically into a semiconductor workpiece to at least a metallization layer of the integrated circuit. The crack prevention ring may be formed simultaneously with the formation of test pads of the integrated circuits. The crack prevention ring may be partially or completely filled with conductive material. An air pocket may be formed within the crack prevention ring beneath a passivation layer of the integrated circuit. The crack prevention ring may be removed during the singulation process.
    Type: Application
    Filed: July 29, 2009
    Publication date: November 26, 2009
    Inventors: Ping-Wei Wang, Chii-Ming Morris Wu
  • Patent number: 7586176
    Abstract: A crack prevention ring at the exterior edge of an integrated circuit prevents delamination and cracking during the separation of the integrated circuits into individual die. The crack prevention ring extends vertically into a semiconductor workpiece to at least a metallization layer of the integrated circuit. The crack prevention ring may be formed simultaneously with the formation of test pads of the integrated circuits. The crack prevention ring may be partially or completely filled with conductive material. An air pocket may be formed within the crack prevention ring beneath a passivation layer of the integrated circuit. The crack prevention ring may be removed during the singulation process.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: September 8, 2009
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Wei Wang, Chii-Ming Morris Wu
  • Patent number: 7223673
    Abstract: A method of forming a crack prevention ring at the exterior edge of an integrated circuit to prevent delamination and cracking during the separation of the integrated circuits into individual die. The crack prevention ring extends vertically into a semiconductor workpiece to at least a metallization layer of the integrated circuit. The crack prevention ring may be formed simultaneously with the formation of test pads of the integrated circuits. The crack prevention ring may be partially or completely filled with conductive material. An air pocket may be formed within the crack prevention ring beneath a passivation layer of the integrated circuit. The crack prevention ring may be removed during the singulation process. An optional seal ring may be formed between the crack prevention ring and the integrated circuit.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: May 29, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Wei Wang, Chii-Ming Morris Wu
  • Patent number: 5920081
    Abstract: A structure of a bond pad to prevent probe pin contamination is disclosed herein a first conductor layer is formed on the substrate. A passivation layer including a titanium nitride layer, a silicon nitride layer, and a silicon oxide layer is formed on the first conductor layer. A photoresist layer is patterned on the passivation layer to define a contact hole, and then etching the passivation layer using the photoresist layer as a mask to form the contact hole. A second conductor layer serving as a top metal of bond pad harder than the first conductor layer is selectively deposited on the first conductor layer, and filled in the contact hole. The present invention can reduce a probe pin contamination so that extend the probe pin lifetime using this selective deposition technique to form the pond pad structure. Additionally, the structure can prevent the contact resistance between the probe pin head and the bond pad increasing, and reduce the probe pin overkill ratio.
    Type: Grant
    Filed: April 25, 1997
    Date of Patent: July 6, 1999
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shyn-Ren Chen, Chii-Ming Morris Wu