Abstract: A method of mounting flip-chip for lowering the on-resistance of power transistor in the protection circuit of rechargeable battery, which comprises a power field effect transistor and a protection IC, has the following steps: first, serially connect drain metal contacts of two transistors to form a chip cell during fabrication of wafer; then, use welding torch to point weld the metal wire on contact of each chip cell, so that the source and gate contacts will form welding metal bumps respectively; cut the wafer to form bare chip cells of two serially connected gate electrodes; stain said chip cell with tin so that said welding metal bumps on contacts are attached with tin balls; apply plastic material to positioned points of printed circuit board; use flip-chip technology to make drain of a bare chip cell face upward, so that said tin balls are aligned with the positioned points of printed circuit board; finally, passing through an oven for heating and pressuring, so that said tin balls will fuse and said pl

Abstract: A method of mounting flip-chip for lowering the on-resistance of power transistor in the protection circuit of rechargeable battery, which comprises a power field effect transistor and a protection IC, has the following steps: first, serially connect drain metal contacts of two transistors to form a chip cell during fabrication of wafer; then, use welding torch to point weld the metal wire on contact of each chip cell, so that the source and gate contacts will form welding metal bumps respectively; cut the wafer to form bare chip cells of two serially connected gate electrodes; stain said chip cell with tin so that said welding metal bumps on contacts are attached with tin balls; apply plastic material to positioned points of printed circuit board; use flip-chip technology to make drain of a bare chip cell face upward, so that said tin balls are aligned with the positioned points of printed circuit board; finally, passing through an oven for heating and pressuring, so that said tin balls will fuse and said pl

Abstract: A method of mounting flip-chip for lowering the on-resistance of power transistor in the protection circuit of rechargeable battery, which comprises a power field effect transistor and a protection IC, has the following steps: first, serially connect drain metal contacts of two transistors to form a chip cell during fabrication of wafer; then, use welding torch to point weld the metal wire on contact of each chip cell, so that the source and gate contacts will form welding metal bumps respectively; cut the wafer to form bare chip cells of two serially connected gate electrodes; stain said chip cell with tin so that said welding metal bumps on contacts are attached with tin balls; apply plastic material to positioned points of printed circuit board; use flip-chip technology to make drain of a bare chip cell face upward, so that said tin balls are aligned with the positioned points of printed circuit board; finally, passing through an oven for heating and pressuring, so that said tin balls will fuse and said pl

Abstract: A self-aligned TiN/TiSi.sub.2 formation using N.sub.2.sup.+ implantation during a two-step annealing Ti-salicidation process is provided. The leakage currents of n.sup.+ /p junction diodes fabricated using this technology were measured to investigate the phenomena of Al spiking into Si-substrate. The measured reverse-bias leakage current of diode per unit junction area with Al/TiN/TiSi.sub.2 contact is 1.2 nA/cm.sup.2 at -5 Volts, which is less than all of reported data. Also it can sustain the annealing process for 30 min at 500.degree. C. Thus, TiN formed with this technology process provides an effective barrier layer between TiSi.sub.2 and Al for submicron CMOS technology applications.