Patents by Inventor CHII-WEN JIANG

CHII-WEN JIANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10593791
    Abstract: A semiconductor structure with current flow path direction controlling is provided, which comprises a substrate and an epitaxial layer having a first conductivity type on the substrate. A first doped region is on the substrate and the first doped region has the first or a second conductivity type. A second doped region is enclosed by the epitaxial layer and has the second conductivity type. A third doped region is located in the epitaxial layer and between the first and second doping regions, and the third doped region has the second conductivity type. A fourth doped region is enclosed by the third doped region and has the first conductivity type. A fifth doped region is enclosed by the first doped region and the conductivity type is opposite to that of the first doped region.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: March 17, 2020
    Inventor: Chii-Wen Jiang
  • Publication number: 20200052105
    Abstract: A semiconductor structure with current flow path direction controlling is provided, which comprises a substrate and an epitaxial layer having a first conductivity type on the substrate. A first doped region is on the substrate and the first doped region has the first or a second conductivity type. A second doped region is enclosed by the epitaxial layer and has the second conductivity type. A third doped region is located in the epitaxial layer and between the first and second doping regions, and the third doped region has the second conductivity type. A fourth doped region is enclosed by the third doped region and has the first conductivity type. A fifth doped region is enclosed by the first doped region and the conductivity type is opposite to that of the first doped region.
    Type: Application
    Filed: October 5, 2018
    Publication date: February 13, 2020
    Inventor: Chii-Wen JIANG
  • Patent number: 8993426
    Abstract: The invention provides a semiconductor device with a junction termination extension structure on a mesa and a method of fabricating the same. The device comprises: a type-I semiconductor substrate having a first surface and a second surface; a type-I epitaxial layer disposed on the first surface; at least one depression disposed on the type-I epitaxial layer; a mesa-type junction termination extension structure surrounding the at least one depression wherein the mesa-type junction termination extension structure is of type-II; and at least one semiconductor component formed one the depression.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: March 31, 2015
    Inventor: Chii-Wen Jiang
  • Publication number: 20140145292
    Abstract: The invention provides a semiconductor device with a junction termination extension structure on a mesa and a method of fabricating the same. The device comprises: a type-I semiconductor substrate having a first surface and a second surface; a type-I epitaxial layer disposed on the first surface; at least one depression disposed on the type-I epitaxial layer; a mesa-type junction termination extension structure surrounding the at least one depression wherein the mesa-type junction termination extension structure is of type-II; and at least one semiconductor component formed one the depression.
    Type: Application
    Filed: January 11, 2013
    Publication date: May 29, 2014
    Inventor: CHII-WEN JIANG