Patents by Inventor Chikako Yoshioka
Chikako Yoshioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10903202Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a plurality of second semiconductor regions of a second conductivity type, each comprising a first part, on the first semiconductor region, wherein the second semiconductor regions are spaced apart in a first direction, a third semiconductor region of the first conductivity type on each of the second semiconductor regions, an insulation portion between two of the second semiconductor regions, the insulation portion having one side in contact with one of the first parts and the other side in contact with one of the third semiconductor regions, a first electrode within the insulation portion, a gate electrode spaced apart from the first electrode and within the insulation portion, and a second electrode on the third semiconductor region and electrically connected to the first electrode and the third semiconductor region.Type: GrantFiled: November 13, 2018Date of Patent: January 26, 2021Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Hiroaki Katou, Masatoshi Arai, Chikako Yoshioka
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Publication number: 20190081030Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a plurality of second semiconductor regions of a second conductivity type, each comprising a first part, on the first semiconductor region, wherein the second semiconductor regions are spaced apart in a first direction, a third semiconductor region of the first conductivity type on each of the second semiconductor regions, an insulation portion between two of the second semiconductor regions, the insulation portion having one side in contact with one of the first parts and the other side in contact with one of the third semiconductor regions, a first electrode within the insulation portion, a gate electrode spaced apart from the first electrode and within the insulation portion, and a second electrode on the third semiconductor region and electrically connected to the first electrode and the third semiconductor region.Type: ApplicationFiled: November 13, 2018Publication date: March 14, 2019Inventors: Hiroaki Katou, Masatoshi Arai, Chikako Yoshioka
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Publication number: 20180102308Abstract: In some embodiments, a semiconductor device includes a semiconductor chip including a first terminal, a second terminal and a third terminal, a frame electrically coupled to the second terminal, the frame mounting the semiconductor chip, a first conductor including a chip connection electrically coupled to the first terminal, a first connection connecting to the chip connection and protruding from the chip connection, and a second connection connecting to the chip connection, protruding from the chip connection, and being provided physically spaced from the first connection. The semiconductor device further includes a second conductor electrically coupled to the third terminal.Type: ApplicationFiled: March 1, 2017Publication date: April 12, 2018Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tatsuya NISHIWAKI, Shunsuke KATOH, Masatoshi ARAI, Chikako YOSHIOKA, Bungo TANAKA, Shinya OZAWA, Takahiro KAWANO
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Patent number: 9660071Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a conductive layer, a gate electrode, and a first electrode. The conductive layer includes a first portion, a second portion, and a third portion. The first portion is surrounded by the first semiconductor region via a first insulating portion. The second portion extends in a second direction, is provided on the first semiconductor region, and is provided on the second region. The third portion is connected between the first portion and the second portion and extends in a third direction. The first electrode is electrically connected to the third semiconductor region and the conductive layer. The second portion electrically connects the first electrode to the third portion.Type: GrantFiled: March 2, 2016Date of Patent: May 23, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Hiroaki Katou, Tatsuya Nishiwaki, Masatoshi Arai, Hiroaki Katsuda, Chikako Yoshioka, Yoshitaka Hokomoto
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Publication number: 20170062604Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a conductive layer, a gate electrode, and a first electrode. The conductive layer includes a first portion, a second portion, and a third portion. The first portion is surrounded by the first semiconductor region via a first insulating portion. The second portion extends in a second direction, is provided on the first semiconductor region, and is provided on the second region. The third portion is connected between the first portion and the second portion and extends in a third direction. The first electrode is electrically connected to the third semiconductor region and the conductive layer. The second portion electrically connects the first electrode to the third portion.Type: ApplicationFiled: March 2, 2016Publication date: March 2, 2017Inventors: Hiroaki KATOU, Tatsuya NISHIWAKI, Masatoshi ARAI, Hiroaki KATSUDA, Chikako YOSHIOKA, Yoshitaka HOKOMOTO
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Publication number: 20170047316Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a plurality of second semiconductor regions of a second conductivity type, each comprising a first part, on the first semiconductor region, wherein the second semiconductor regions are spaced apart in a first direction, a third semiconductor region of the first conductivity type on each of the second semiconductor regions, an insulation portion between two of the second semiconductor regions, the insulation portion having one side in contact with one of the first parts and the other side in contact with one of the third semiconductor regions, a first electrode within the insulation portion, a gate electrode spaced apart from the first electrode and within the insulation portion, and a second electrode on the third semiconductor region and electrically connected to the first electrode and the third semiconductor region.Type: ApplicationFiled: February 29, 2016Publication date: February 16, 2017Inventors: Hiroaki KATOU, Masatoshi ARAI, Chikako YOSHIOKA
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Publication number: 20170040252Abstract: According to one embodiment, a semiconductor device comprises a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a gate electrode, a gate interconnect, a second insulating layer, and a first electrode. The first semiconductor region includes a first region and a second region provided around the first region. The gate interconnect is provided on the second region. The gate interconnect includes a first portion and a second portion provided around the second portion. A thickness in the first direction of the second portion is thinner than a thickness in the first direction of the first portion. A length in the second direction of the gate interconnect is longer than a length in the third direction of the gate electrode. The first electrode contacts the gate interconnect.Type: ApplicationFiled: February 4, 2016Publication date: February 9, 2017Inventors: Tatsuya Nishiwaki, Masatoshi Arai, Hiroaki Katou, Hiroaki Katsuda, Chikako Yoshioka, Rieko Matoba
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Patent number: 9559057Abstract: According to one embodiment, a semiconductor device comprises a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a gate electrode, a gate interconnect, a second insulating layer, and a first electrode. The first semiconductor region includes a first region and a second region provided around the first region. The gate interconnect is provided on the second region. The gate interconnect includes a first portion and a second portion provided around the second portion. A thickness in the first direction of the second portion is thinner than a thickness in the first direction of the first portion. A length in the second direction of the gate interconnect is longer than a length in the third direction of the gate electrode. The first electrode contacts the gate interconnect.Type: GrantFiled: February 4, 2016Date of Patent: January 31, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Tatsuya Nishiwaki, Masatoshi Arai, Hiroaki Katou, Hiroaki Katsuda, Chikako Yoshioka, Rieko Matoba
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Patent number: 5935717Abstract: The present invention provides a functional film composed of an organic film having a low heat resistance and an inorganic thin film in which functional particles such as photocatalytic particles or conductive particles are dispersed, the inorganic thin film being formed on the organic film. The functional film is stuck on the surface of, for example, a CRT display with a pressure-sensitive adhesive or the like for simply securing antireflection and antistatic effects of the CRT display. The functional film including an inorganic thin film in which photocatalytic particles are dispersed, is stuck on wallpaper or the like for simply securing deodorant and stainproofing effects of the wallpaper.Type: GrantFiled: June 23, 1997Date of Patent: August 10, 1999Assignee: Hitachi, Ltd.Inventors: Tomoji Oishi, Takao Ishikawa, Daigorou Kamoto, Ken Takahashi, Chikako Yoshioka