Patents by Inventor Chikara Imajo

Chikara Imajo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10129543
    Abstract: A prefetched-image memory stores a prefetched image of a prefetched area prefetched from a reference image memory that stores a reference image. A processor performs a motion search using a reduced image obtained by reducing an encoding target image and generates a search result for an encoding target block included in the encoding target image. The processor determines, based on the search result, that an area situated outside the prefetched area in the reference image is to be searched when the processor has predicted from the search result that a matching of the encoding target block and the prefetched image will be unsuccessful. Next, the processor performs a matching of the encoding target block and an image of a matching target area including the outside area in the reference image and generates an inter-prediction result. Then, the processor encodes the encoding target block based on the inter-prediction result.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: November 13, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Ayana Tanaka, Yasuo Misuda, Chikara Imajo
  • Publication number: 20170289542
    Abstract: A first encoder encodes an input image by using a first encoding algorithm. A memory stores a decoded image obtained by decoding a code generated by the first encoder. A converter converts a shape of a block of the input image that is segmented into a plurality of blocks. A second encoder encodes the block converted by the converter according to the decoded image by using a second encoding algorithm that is different from the first encoding algorithm.
    Type: Application
    Filed: March 17, 2017
    Publication date: October 5, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Shinji URANAKA, CHIKARA IMAJO, YASUO MISUDA
  • Publication number: 20170280137
    Abstract: A prefetched-image memory stores a prefetched image of a prefetched area prefetched from a reference image memory that stores a reference image. A processor performs a motion search using a reduced image obtained by reducing an encoding target image and generates a search result for an encoding target block included in the encoding target image. The processor determines, based on the search result, that an area situated outside the prefetched area in the reference image is to be searched when the processor has predicted from the search result that a matching of the encoding target block and the prefetched image will be unsuccessful. Next, the processor performs a matching of the encoding target block and an image of a matching target area including the outside area in the reference image and generates an inter-prediction result. Then, the processor encodes the encoding target block based on the inter-prediction result.
    Type: Application
    Filed: March 17, 2017
    Publication date: September 28, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Ayana Tanaka, YASUO MISUDA, CHIKARA IMAJO
  • Patent number: 9538168
    Abstract: A determination device includes a memory and a processor coupled to the memory. The processor executes a process including: loading a plurality of video image signals including stereo images between which a position of an object in the stereo images differs in accordance with a parallax; performing block matching processing on the stereo images to detect a motion vector on a block-by-block basis in one of the stereo images and to calculate similarity on a block-by-block basis; determining whether to display a three-dimensional screen based on the stereo images or a two-dimensional screen, based on the motion vector or the similarity, or a combination thereof; and adding a result of the determining to the stereo images and outputting the stereo images added with the result to a display device that displays the stereo images.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: January 3, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Chikara Imajo, Koji Takata
  • Publication number: 20160373688
    Abstract: A non-transitory computer readable storage medium that stores a coded data generation program that causes a computer to execute a process including obtaining a plurality of images, generated based on a same original image, having different resolutions, determining a specified configuration for coding a specified image that is one of the plurality of images, and coding each of the plurality of images by using the specified configuration.
    Type: Application
    Filed: June 15, 2016
    Publication date: December 22, 2016
    Applicant: FUJITSU LIMITED
    Inventors: CHIKARA IMAJO, YASUO MISUDA
  • Publication number: 20160127739
    Abstract: A motion search processing method includes: dividing, by a computer, first image data included in video data in accordance with a frequency band and generating a plurality of pieces of divided image data; performing compression processing on first divided image data among the plurality of pieces of divided image data and generating compressed divided image data, the first divided image data including a frequency component of which a frequency band is equal to or more than a value; performing first motion search processing on the video data by using second divided image data among the plurality of pieces of divided image data, the second divided image data including a frequency component of which a frequency band is less than the value; and generating second image data by using the plurality of pieces of divided image data and performing second motion search processing by using the second image data.
    Type: Application
    Filed: August 24, 2015
    Publication date: May 5, 2016
    Inventors: Yoshihiro Terashima, CHIKARA IMAJO, YASUO MISUDA
  • Publication number: 20150002644
    Abstract: A determination device includes a memory and a processor coupled to the memory. The processor executes a process including: loading a plurality of video image signals including stereo images between which a position of an object in the stereo images differs in accordance with a parallax; performing block matching processing on the stereo images to detect a motion vector on a block-by-block basis in one of the stereo images and to calculate similarity on a block-by-block basis; determining whether to display a three-dimensional screen based on the stereo images or a two-dimensional screen, based on the motion vector or the similarity, or a combination thereof; and adding a result of the determining to the stereo images and outputting the stereo images added with the result to a display device that displays the stereo images.
    Type: Application
    Filed: September 19, 2014
    Publication date: January 1, 2015
    Inventors: CHIKARA IMAJO, Koji Takata
  • Publication number: 20140375774
    Abstract: A generation device includes a processor configured to execute a process including: acquiring a plurality of picture signals each including two images between which a position of an object in the two images differs in accordance with a parallax; changing the parallax by relatively moving the two images in a display area; generating an image for the display area by acquiring, with respect to an image moved in the display area out of the two images, an image of a part corresponding to an area in which the image is not included in the display area from the other image out of the two images and setting the acquired image in the area; and outputting the generated image for the display area.
    Type: Application
    Filed: September 8, 2014
    Publication date: December 25, 2014
    Inventors: Chikara IMAJO, Koji TAKATA
  • Patent number: 8428131
    Abstract: A video encoder that encodes each of a plurality of blocks obtained by dividing an input image, includes: a definition unit configured to define a valid area which is allowed to be used as reference in a reference image in interframe coding; a detection unit configured to detect a reference area in the reference image for a target block; a predicted image generation unit configured to generate a predicted image by outputting an image of the reference area for the reference area belonging to the valid area and outputting a complementary image for the reference area not belonging to the valid area; and a coding unit configured to encode the input image using the predicted image, wherein valid area information indicating the valid area is transmitted to a video decoder, for each group of a plurality of blocks.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: April 23, 2013
    Assignee: Fujitsu Limited
    Inventors: Satoshi Shimada, Akira Nakagawa, Akihiro Yamori, Chikara Imajo
  • Patent number: 8204322
    Abstract: A method of coding (decoding) an image comprised of a pixel block divided into a plurality of sub-blocks, which method autonomously determines an order of optimal coding (decoding) adapted to a correlation between adjacent sub-blocks without providing additional information. This method pays attention to context information accompanying the image information and instructing a correlation direction between pictures and so on, sequentially predicts a reference sub-block serving the best coding (decoding) efficiency among adjacent reference sub-blocks to be referred to for the coding (decoding) based on the correlation direction, and determining the order of coding (decoding) according to this prediction.
    Type: Grant
    Filed: February 6, 2008
    Date of Patent: June 19, 2012
    Assignee: Fujitsu Limited
    Inventor: Chikara Imajo
  • Publication number: 20100172412
    Abstract: A video encoder that encodes each of a plurality of blocks obtained by dividing an input image, includes: a definition unit configured to define a valid area which is allowed to be used as reference in a reference image in interframe coding; a detection unit configured to detect a reference area in the reference image for a target block; a predicted image generation unit configured to generate a predicted image by outputting an image of the reference area for the reference area belonging to the valid area and outputting a complementary image for the reference area not belonging to the valid area; and a coding unit configured to encode the input image using the predicted image, wherein valid area information indicating the valid area is transmitted to a video decoder, for each group of a plurality of blocks.
    Type: Application
    Filed: March 12, 2010
    Publication date: July 8, 2010
    Applicant: Fujitsu Limited
    Inventors: Satoshi SHIMADA, Akira Nakagawa, Akihiro Yamori, Chikara Imajo
  • Publication number: 20080240585
    Abstract: A method of coding (decoding) an image comprised of a pixel block divided into a plurality of sub-blocks, which method autonomously determines an order of optimal coding (decoding) adapted to a correlation between adjacent sub-blocks without providing additional information. This method pays attention to context information accompanying the image information and instructing a correlation direction between pictures and so on, sequentially predicts a reference sub-block serving the best coding (decoding) efficiency among adjacent reference sub-blocks to be referred to for the coding (decoding) based on the correlation direction, and determining the order of coding (decoding) according to this prediction.
    Type: Application
    Filed: February 6, 2008
    Publication date: October 2, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Chikara Imajo