Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type having a first impurity concentration C11, an epitaxial semiconductor layer disposed on the first semiconductor layer, a first device region formed in a first region of the epitaxial semiconductor layer in a plan view, a second device region formed in a second region of the epitaxial semiconductor layer in a plan view, and to which a higher voltage is applied than a voltage applied to the first device region, and a second semiconductor layer of the first conductivity type having a second impurity concentration C12. The second semiconductor layer is formed on the first semiconductor layer within the first region but is not formed on the first semiconductor layer within the second region. The following relationship is satisfied: C11<C12, and 2×1014 cm?3?C12?1×1016 cm?3.

Abstract: A semiconductor device includes a semiconductor substrate, a semiconductor layer located on the semiconductor substrate, a drain region; a source/gate region, an insulating layer located above the semiconductor layer, and a field plate located on the insulating layer, wherein the field plate includes an innermost periphery, an outermost periphery, a first straight line portion and a second straight line portion located between the innermost periphery and the outermost periphery, and a first connection portion connecting the first straight line portion and the second straight line portion, wherein each of the innermost periphery, the outermost periphery, the first straight line portion, the second straight line portion and the first connection portion is a part of a current path, and wherein each of the first straight line portion and the second straight line portion extends in a second direction intersecting with the first direction in a plan view.

Abstract: A semiconductor device includes a chip having a main surface, a first conductivity type drain region formed in a surficial portion of the main surface, a first conductivity type source region formed in a region differing from the drain region in the surficial portion of the main surface, a second conductivity type back gate region formed in a region differing from the drain region and from the source region in the surficial portion of the main surface so as to be electrically separated from the drain region and from the source region, a gate insulation film covering the source region on the main surface, and a gate electrode formed on the gate insulation film.

Abstract: A semiconductor device of the present invention is a semiconductor device selectively including a nonvolatile memory cell on a semiconductor substrate, and includes a trench formed in the semiconductor substrate, an element separation portion buried into the trench such that the element separation portion has a projecting part projecting from the semiconductor substrate, the element separation portion defining an active region in first a region for the nonvolatile memory cell of the semiconductor substrate, and a floating gate disposed in the active region such that the floating gate selectively has an overlapping part overlapping the element separation portion, and the floating gate has a shape recessed with respect to the overlapping part.

Abstract: A semiconductor device of the present invention is a semiconductor device selectively including a nonvolatile memory cell on a semiconductor substrate, and includes a trench formed in the semiconductor substrate, an element separation portion buried into the trench such that the element separation portion has a projecting part projecting from the semiconductor substrate, the element separation portion defining an active region in first a region for the nonvolatile memory cell of the semiconductor substrate, and a floating gate disposed in the active region such that the floating gate selectively has an overlapping part overlapping the element separation portion, and the floating gate has a shape recessed with respect to the overlapping part.