Patents by Inventor Chikashi Nakagawara
Chikashi Nakagawara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9684323Abstract: A regulator circuit includes a first MOS transistor having a current channel connected between an input terminal and an output terminal, a regulator control circuit configured to control an amount of a current flowing through the current channel of the first MOS transistor towards the output terminal, a second MOS transistor having a current channel connected between the input terminal and the current channel of the first MOS transistor, and a body diode, a forward direction of which is along a direction from the input terminal to the output terminal, and a switch control circuit configured to switch off the second MOS transistor when a voltage at the input terminal decreases to a predetermined value that is equal to or greater than a voltage at the output terminal.Type: GrantFiled: February 27, 2015Date of Patent: June 20, 2017Assignee: Kabushiki Kaisha ToshibaInventor: Chikashi Nakagawara
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Publication number: 20160033983Abstract: A regulator circuit includes a first MOS transistor having a current channel connected between an input terminal and an output terminal, a regulator control circuit configured to control an amount of a current flowing through the current channel of the first MOS transistor towards the output terminal, a second MOS transistor having a current channel connected between the input terminal and the current channel of the first MOS transistor, and a body diode, a forward direction of which is along a direction from the input terminal to the output terminal, and a switch control circuit configured to switch off the second MOS transistor when a voltage at the input terminal decreases to a predetermined value that is equal to or greater than a voltage at the output terminal.Type: ApplicationFiled: February 27, 2015Publication date: February 4, 2016Inventor: Chikashi NAKAGAWARA
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Publication number: 20140285932Abstract: A protection circuit comprises first and second input terminals to which a power source voltage for a protected load circuit can be applied. A first transistor connected between the input terminals. The first transistor has a gate/base electrode connected to a current path electrode through a resistor. A low-pass filter is connected in parallel with the first transistor between the input terminals. A second transistor connected in parallel with the resistor, and having a control electrode connected to an output terminal of the low-pass filter. Zener diodes may be optionally included to provide overvoltage protection. In some embodiments, the low-pass filter may comprise a series-connected resistor and capacitor.Type: ApplicationFiled: September 3, 2013Publication date: September 25, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Shinya MIYAMOTO, Chikashi NAKAGAWARA
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Patent number: 8829835Abstract: According to one embodiment, a controller of a motor includes a driving signal output module, a position detector, a determiner, and an over current detector. The driving signal output module is configured to generate a driving signal for generating a driving current of a motor, a duty ratio of the driving signal being depending on an over current detection signal. The position detector is configured to generate a position detection signal for determining an operating status of the motor by comparing an induction voltage generated by a rotation of a rotor of the motor by the driving current with a predetermined reference voltage. The determiner is configured to determine whether the motor is in a starting state where a rotating frequency of the rotor is smaller than a predetermined value or in a steady state where the rotating frequency of the rotor is equal to or higher than the predetermined value based on the position detection signal.Type: GrantFiled: September 3, 2010Date of Patent: September 9, 2014Assignee: Kabushiki Kaisha ToshibaInventor: Chikashi Nakagawara
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Patent number: 8680867Abstract: A battery monitoring circuit monitors voltages of a plurality of secondary cells connected in series. The battery monitoring circuit comprises a first switch element, a second switch element, a third switch element, and a first capacitor. The battery monitoring circuit comprises an operational amplifier of which an inverting input terminal is connected to a second end of the first capacitor, a non-inverting input terminal is connected to a fixed potential, and an output is connected to the second end of the first capacitor. The battery monitoring circuit comprises an A/D converter which performs analog-to-digital conversion on a signal output by the operational amplifier and outputs an obtained digital signal. The battery monitoring circuit comprises a control circuit which performs on/off control on the first to third switch elements and controls operations of the operational amplifier and the A/D converter.Type: GrantFiled: September 14, 2011Date of Patent: March 25, 2014Assignee: Kabushiki Kaisha ToshibaInventor: Chikashi Nakagawara
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Patent number: 8643352Abstract: According to embodiments, a switching power supply control apparatus causes a switching element to perform an ON/OFF once in each period of a clock signal, when an output voltage of a switching power supply formed by charging a capacitor with a current of a choke coil that stores/releases current energy in conjunction with the ON/OFF operation of the switching element is adjusted by exercising ON/OFF control of the switching element based on comparator output that compares the output voltage with a reference voltage.Type: GrantFiled: September 16, 2010Date of Patent: February 4, 2014Assignee: Kabushiki Kaisha ToshibaInventor: Chikashi Nakagawara
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Patent number: 8253468Abstract: According to one embodiment, a clock generating circuit includes first and second current generating circuits, first and second voltage generating circuits, first and second comparing circuits, a clock output circuit, a control circuit. The first current generating circuit is configured to generate a first current. The first voltage generating circuit is configured to generate a first voltage which increases or decreases according to a phase of a clock signal as time advances by the first current. The first comparing circuit is configured to compare the first voltage with a first threshold voltage to generate a first comparison result. The second current generating circuit is configured to generate a second current. The second comparing circuit is configured to compare the second voltage with a second threshold voltage to generate a second comparison result.Type: GrantFiled: February 4, 2011Date of Patent: August 28, 2012Assignee: Kabushiki Kaisha ToshibaInventor: Chikashi Nakagawara
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Publication number: 20120182019Abstract: A battery monitoring circuit monitors voltages of a plurality of secondary cells connected in series. The battery monitoring circuit comprises a first switch element, a second switch element, a third switch element, and a first capacitor. The battery monitoring circuit comprises an operational amplifier of which an inverting input terminal is connected to a second end of the first capacitor, a non-inverting input terminal is connected to a fixed potential, and an output is connected to the second end of the first capacitor. The battery monitoring circuit comprises an A/D converter which performs analog-to-digital conversion on a signal output by the operational amplifier and outputs an obtained digital signal. The battery monitoring circuit comprises a control circuit which performs on/off control on the first to third switch elements and controls operations of the operational amplifier and the A/D converter.Type: ApplicationFiled: September 14, 2011Publication date: July 19, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Chikashi Nakagawara
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Publication number: 20110273214Abstract: According to one embodiment, a clock generating circuit includes first and second current generating circuits, first and second voltage generating circuits, first and second comparing circuits, a clock output circuit, a control circuit. The first current generating circuit is configured to generate a first current. The first voltage generating circuit is configured to generate a first voltage which increases or decreases according to a phase of a clock signal as time advances by the first current. The first comparing circuit is configured to compare the first voltage with a first threshold voltage to generate a first comparison result. The second current generating circuit is configured to generate a second current. The second comparing circuit is configured to compare the second voltage with a second threshold voltage to generate a second comparison result.Type: ApplicationFiled: February 4, 2011Publication date: November 10, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Chikashi Nakagawara
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Patent number: 8013671Abstract: A semiconductor integrated circuit includes a first input terminal configured to input a first input voltage, a second input terminal configured to input a second input voltage, a differential amplifier configured to generate a differential output voltage by amplifying a differential input voltage obtained from a difference between the first input voltage input by the first input terminal and the second input voltage input by the second input terminal, a switch configured to electrically connect or cut off the first input terminal and the second input terminal, and a sample hold unit connected to a power supply which generates a reference voltage and configured to generate an offset correction voltage of the differential amplifier based on the differential output voltage and the reference voltage when the first input terminal and the second input terminal are electrically connected by the switch.Type: GrantFiled: March 19, 2010Date of Patent: September 6, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Akira Kumamoto, Tsuyoshi Nishimura, Chikashi Nakagawara, Masahiro Tamae
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Publication number: 20110181215Abstract: According to one embodiment, a controller of a motor includes a driving signal output module, a position detector, a determiner, and an over current detector. The driving signal output module is configured to generate a driving signal for generating a driving current of a motor, a duty ratio of the driving signal being depending on an over current detection signal. The position detector is configured to generate a position detection signal for determining an operating status of the motor by comparing an induction voltage generated by a rotation of a rotor of the motor by the driving current with a predetermined reference voltage. The determiner is configured to determine whether the motor is in a starting state where a rotating frequency of the rotor is smaller than a predetermined value or in a steady state where the rotating frequency of the rotor is equal to or higher than the predetermined value based on the position detection signal.Type: ApplicationFiled: September 3, 2010Publication date: July 28, 2011Applicant: Kabushiki Kaisha ToshibaInventor: Chikashi NAKAGAWARA
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Publication number: 20110156681Abstract: According to embodiments, a switching power supply control apparatus causes a switching element to perform an ON/OFF once in each period of a clock signal, when an output voltage of a switching power supply formed by charging a capacitor with a current of a choke coil that stores/releases current energy in conjunction with the ON/OFF operation of the switching element is adjusted by exercising ON/OFF control of the switching element based on comparator output that compares the output voltage with a reference voltage.Type: ApplicationFiled: September 16, 2010Publication date: June 30, 2011Applicant: Kabushiki Kaisha ToshibaInventor: Chikashi NAKAGAWARA
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Publication number: 20110063029Abstract: A semiconductor integrated circuit includes a first input terminal configured to input a first input voltage, a second input terminal configured to input a second input voltage, a differential amplifier configured to generate a differential output voltage by amplifying a differential input voltage obtained from a difference between the first input voltage input by the first input terminal and the second input voltage input by the second input terminal, a switch configured to electrically connect or cut off the first input terminal and the second input terminal, and a sample hold unit connected to a power supply which generates a reference voltage and configured to generate an offset correction voltage of the differential amplifier based on the differential output voltage and the reference voltage when the first input terminal and the second input terminal are electrically connected by the switch.Type: ApplicationFiled: March 19, 2010Publication date: March 17, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Akira Kumamoto, Tsuyoshi Nishimura, Chikashi Nakagawara, Masahiro Tamae
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Patent number: 6486695Abstract: A protecting unit is provided. The protecting unit can prevent accidents from occurring that become problems when data are transmitted due to for instance LVDS and for instance laser light is emitted based on the data. The protecting unit is applied in an instrument comprising an input end to which differential signal is transmitted, the input end being attachable to and detachable from an input line. Here, the voltage at the input end when the input line is not connected is set to a voltage different from that generated at the input end when the input line is connected, variation of the voltage at the input end is transmitted to an input terminal of a differential input/output circuit, and the voltage at the input end or a portion corresponding thereto is compared with a prescribed voltage to fix a state of output of the differential input/output circuit to a prescribed state based on the compared results.Type: GrantFiled: April 10, 2000Date of Patent: November 26, 2002Assignee: Kabushiki Kaisha ToshibaInventor: Chikashi Nakagawara
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Patent number: 6181365Abstract: A RF output device for CATV processing having a switch provided on the upstream line in a cable modem. Data is transmitted from each household PC through the upstream line to a base station at a final stage having the highest possible signal level so as to transmit the output of the switch to an output terminal through a buffer circuit. Thereby, the performance of the RF output device is improved and the cost of the RF output device is reduced, based upon the minimized noise level when the switch is turned to an off state, and carrier leakage is prevented without having an oscillation stopping switch present for the voltage controlled oscillator.Type: GrantFiled: October 28, 1999Date of Patent: January 30, 2001Assignee: Kabushiki Kaisha ToshibaInventor: Chikashi Nakagawara
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Patent number: 5532644Abstract: A variable gain amplifying circuit is disclosed, which comprises a first transistor pair whose bases are connected to input terminals, a PN junction pair with bias currents that are collector currents of the first transistor pair, a second transistor pair with a common emitter that is a base input of a voltage difference of the PN junction pair, the common emitter having a current source, and a third transistor pair whose collectors are connected to corresponding emitters of the first transistor pair, whose bases are connected to the corresponding collectors, whose emitter are connected through a resistor, and whose emitters are connected to a current source for supplying bias currents, wherein outputs are obtained from the collector of the second transistor pair.Type: GrantFiled: February 23, 1995Date of Patent: July 2, 1996Assignee: Kabushiki Kaisha ToshibaInventor: Chikashi Nakagawara
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Patent number: 5293514Abstract: An integrating filter circuit having a reference potential source for supplying the integrating filter circuit with a prescribed reference potential, a transconductance circuit provided with a differential circuit, a variable current source couple to the differential circuit and output means coupled to the differential circuit for outputting an intermediate voltage of the outputs of the differential circuit, a common feedback loop with a comparison circuit coupled between the output means and the variable current source so as to stabilize the intermediate voltage in reference to a reference voltage supplied to the comparison circuit and capacitors coupled between the variable current source and the reference potential source.Type: GrantFiled: June 24, 1992Date of Patent: March 8, 1994Assignee: Kabushiki Kaisha ToshibaInventor: Chikashi Nakagawara
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Patent number: 5223743Abstract: An adaptive current generating circuit having a reference voltage supply circuit for supplying a reference voltage subjected to a fluctuation of supply voltage, a reference current supply circuit for supplying reference current responsive to the reference voltage supplied by the reference voltage supply circuit, a control current supply circuit for supplying control current subjected to the fluctuation of the supply voltage and a bias supply circuit for supplying a bias to the reference current supply circuit corresponding to a difference between the reference current supplied by the reference current supply circuit and the control current supplied by the control current supply circuit.Type: GrantFiled: April 24, 1992Date of Patent: June 29, 1993Assignee: Kabushiki Kaisha ToshibaInventor: Chikashi Nakagawara
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Patent number: 5126831Abstract: In the clamping circuit, errors in direct current components contained in R, G and B signals from a matrix circuit are detected by comparing circuits and these errors are fed back to respective input capacitors through a reverse matrix circuit. The respective input capacitors are charged and discharged in response to the errors from the matrix circuit and the direct current parts of the outputs of the matrix circuit coincide so that the clamping levels of the outputs of the matrix circuit may coincide.Type: GrantFiled: March 29, 1991Date of Patent: June 30, 1992Assignee: Kabushiki Kaisha ToshibaInventor: Chikashi Nakagawara
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Patent number: 5111154Abstract: An analog active filter for realizing the secondary transfer function by using an amplifier having a feedback loop having a first integrating function block which integrates an input signal, second and third integrating function blocks which integrate an output signal, a first signal combining function block which combines signals from the first and second integrating function blocks with the input signal, a fourth integrating function block which integrates signals from the first signal combining function block, and a second signal combining function block which combines signals from the third and fourth integrating function blocks with the input signal and derives the output signal.Type: GrantFiled: December 24, 1990Date of Patent: May 5, 1992Assignee: Kabushiki Kaisha ToshibaInventor: Chikashi Nakagawara