Patents by Inventor Chin-Chang Wu

Chin-Chang Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240152679
    Abstract: Systems, methods, and devices are described herein for integrated circuit (IC) layout validation. A plurality of IC patterns are collected which include a first set of patterns capable of being manufactured and a second set of patterns incapable of being manufactured. A machine learning model is trained using the plurality of IC patterns. The machine learning model generates a prediction model for validating IC layouts. The prediction model receives data including a set of test patterns comprising scanning electron microscope (SEM) images of IC patterns. Design violations associated with an IC layout are determined based on the SEM images and the plurality of IC patterns. A summary of the design violations is provided for further characterization of the IC layout.
    Type: Application
    Filed: January 17, 2024
    Publication date: May 9, 2024
    Inventors: Rachid Salik, Chin-Chang Hsu, Cheng-Chi Wu, Chien-Wen Chen, Wen-Ju Yang
  • Publication number: 20240142671
    Abstract: An electronic device includes: a first substrate; a second substrate, disposed opposite to the first substrate; an insulating layer, disposed on a surface of the first substrate away from the second substrate; and a metal layer, disposed on a surface of the second substrate away from the first substrate, wherein a width of the insulating layer is different from a width of the metal layer.
    Type: Application
    Filed: January 3, 2024
    Publication date: May 2, 2024
    Inventors: Chi-Fang WU, Chin-Lung TING, I-Chang LIANG
  • Patent number: 11939664
    Abstract: A semiconductor process system includes a process chamber. The process chamber includes a wafer support configured to support a wafer. The system includes a bell jar configured to be positioned over the wafer during a semiconductor process. The interior surface of the bell jar is coated with a rough coating. The rough coating can include zirconium.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Meng-Chun Hsieh, Tsung-Yu Tsai, Hsing-Yuan Huang, Chih-Chang Wu, Szu-Hua Wu, Chin-Szu Lee
  • Patent number: 11914941
    Abstract: Systems, methods, and devices are described herein for integrated circuit (IC) layout validation. A plurality of IC patterns are collected which include a first set of patterns capable of being manufactured and a second set of patterns incapable of being manufactured. A machine learning model is trained using the plurality of IC patterns. The machine learning model generates a prediction model for validating IC layouts. The prediction model receives data including a set of test patterns comprising scanning electron microscope (SEM) images of IC patterns. Design violations associated with an IC layout are determined based on the SEM images and the plurality of IC patterns. A summary of the design violations is provided for further characterization of the IC layout.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Rachid Salik, Chin-Chang Hsu, Cheng-Chi Wu, Chien-Wen Chen, Wen-Ju Yang
  • Publication number: 20230388801
    Abstract: A method for implementing requests from an app by a SIM in a mobile phone comprises the steps of: binding an app to a BIP server by a mobile phone; delivering a request command to the BIP server from the mobile phone; converting the request command to an APDU format, packing the converted request command in the APDU format in a request packet, and delivering the request packet to an IP of a SIM by the BIP server; receiving and unpacking the request packet to have the converted request command, and providing the converted request command to the SIM; executing the request command to have a result by the SIM; delivering the result in a response packet to the BIP server via the mobile network relayed; unpacking the response packet to fetch the result, and delivering the result to the mobile phone for the app by the BIP server.
    Type: Application
    Filed: May 26, 2022
    Publication date: November 30, 2023
    Inventors: CHUN HSIN HO, CHIH NUNG WANG, CHIEN CHOU CHEN, CHIN CHANG WU
  • Patent number: 9407165
    Abstract: A cascade bridge-type DC-AC power converter device includes a low-frequency bridge-type power converter including an AC terminal and a DC bus and a high-frequency bridge-type power converter including an AC terminal. A power conversion method includes: serially connecting the AC terminal of the high-frequency bridge-type power converter and the AC terminal of the low-frequency bridge-type power converter; operating frequency of the low-frequency bridge-type power converter synchronized with frequency of an AC source; and operating the high-frequency bridge-type power converter with high-frequency PWM to generate a multilevel AC voltage. A DC power source connects to the DC bus of the low-frequency bridge-type power converter. No additional power supply circuit will be required for power supply to a DC bus of the high-frequency bridge-type power converter. Accordingly, the power circuit is simplified, and the manufacturing cost is reduced.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: August 2, 2016
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Chin-Chang Wu, Wen-Jung Chiang, Chien-Ming Huang, Wen-Jie Hou
  • Patent number: 8923027
    Abstract: A five-level DC-AC converter includes a capacitor set and a full-bridge circuit. The capacitor set contains two DC capacitors, a power electronic switch and two diodes. When the power electronic switch is turned on/off, the two DC capacitors are connected in series/parallel to provide a two-level DC voltage to the full-bridge circuit. The full-bridge circuit further converts the two-level DC voltage to output a voltage with three voltage levels in the positive half cycle and three voltage levels in the negative half cycle. This achieves the goal of using five power electronic switches to convert DC power into AC power with five voltage levels.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: December 30, 2014
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Chin-Chang Wu, Wen-Jung Chiang, Ming-Pin Mai, Chia-Wei Chou, Mao-Jang He
  • Patent number: 8878489
    Abstract: An estimation method for residual discharging time of batteries includes the steps of: providing a set of battery-discharge-current intervals and a set of battery-discharge equations, setting the discharge time of each battery-discharge-current intervals at zero; detecting a discharge current, voltage and time of batteries; judging whether the discharge current exceeds all of the battery-discharge-current intervals; selecting one of the battery-discharge-current intervals and the associated battery-discharge equation according to the detected discharge current; calculating an estimation of residual discharging time; accumulating and recording the discharge time; judging whether the discharge voltage is lower than a predetermined value and calculating an estimation error of the residual discharging time; and adjusting parameters of the battery-discharge equation for reducing the estimation error of the residual discharging time if the estimation error is greater than a predetermined error value.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: November 4, 2014
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Hung-Liang Chou, Yu-Hua Sun, Chin-Chang Wu, Wen-Jung Chiang
  • Publication number: 20140301124
    Abstract: A cascade bridge-type DC-AC power converter device includes a low-frequency bridge-type power converter including an AC terminal and a DC bus and a high-frequency bridge-type power converter including an AC terminal. A power conversion method includes: serially connecting the AC terminal of the high-frequency bridge-type power converter and the AC terminal of the low-frequency bridge-type power converter; operating frequency of the low-frequency bridge-type power converter synchronized with frequency of an AC source and operating the high-frequency bridge-type power converter with high-frequency PWM to generate a multilevel AC voltage. A DC power source connects to the DC bus of the low-frequency bridge-type power converter. No additional power supply circuit will be required for power supply to a DC bus of the high-frequency bridge-type power converter. Accordingly, the power circuit is simplified and the manufacturing cost is reduced.
    Type: Application
    Filed: March 27, 2014
    Publication date: October 9, 2014
    Applicant: Ablerex Electronics Co., Ltd.
    Inventors: Chin-Chang Wu, Wen-Jung Chiang, Chien-Ming Huang, Wen-Jie Hou
  • Publication number: 20130326816
    Abstract: A pillow assembly has a body and two lateral sleeping modules. The body includes a supine sleeping area and two lateral sleeping areas, and the supine sleeping area is between the lateral sleeping areas. The two lateral sleeping modules are separately mounted on the lateral sleeping areas of the body. Each lateral sleeping module have at least one lateral sleeping height-adjusting unit and a fixed section to hold the at least one lateral sleeping height-adjusting unit on one of the lateral sleeping areas at position. The height of the pillow assembly is adjustable according to different figures of users. Therefore, the pillow assembly has a better comfort, support and suitability to reduce tension of neck muscle of the user.
    Type: Application
    Filed: June 11, 2012
    Publication date: December 12, 2013
    Applicant: SUNFAR COMPUTER CO., LTD.
    Inventor: CHIN-CHANG WU
  • Publication number: 20130033912
    Abstract: A five-level DC-AC converter includes a capacitor set and a full-bridge circuit. The capacitor set contains two DC capacitors, a power electronic switch and two diodes. When the power electronic switch is turned on/off, the two DC capacitors are connected in series/parallel to provide a two-level DC voltage to the full-bridge circuit. The full-bridge circuit further converts the two-level DC voltage to output a voltage with three voltage levels in the positive half cycle and three voltage levels in the negative half cycle. This achieves the goal of using five power electronic switches to convert DC power into AC power with five voltage levels.
    Type: Application
    Filed: February 13, 2012
    Publication date: February 7, 2013
    Inventors: Chin-Chang Wu, Wen-Jung Chiang, Ming-Pin Mai, Chia-Wei Chou, Mao-Jang He
  • Patent number: 8130524
    Abstract: A bi-directional DC to DC power converter includes two DC sources, two inductors respectively connected to the two DC sources, a first switch and a second switch respectively connected to the two inductors, two capacitors respectively connected to the two switches, and a third switch connected between the two inductors. The first, second and third switches are respectively connected reversely with a diode in parallel. When the third switch is alternately turned on and off and the first and second switches are always turned off, the power converter operates as a boost power converter and electric energy flows from the two DC sources to the two capacitors. When the third switch is always turned off and the first and second switches are synchronously turned on or off, the power converter operates as a buck power converter and electric energy flows from the two capacitors to the two DC sources.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: March 6, 2012
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Yi-Hu Lee, Wen Hsu, Chin-Chang Wu, Hung-Liang Chou, Ya-Tsung Feng
  • Patent number: 8111528
    Abstract: A DC to AC inverter has a DC power input port, a buck converter, a buck/boost converter, an output filter and an AC output port. The DC power input port has a positive input terminal and a negative input terminal, both connected to a DC source. The AC output port is connected to a single-phase utility system. When the single-phase utility system is in positive half cycle, the buck converter generates a positive half-cycle signal of sinusoidal current. When the single-phase utility system is in negative half cycle, the buck/boost converter generates a negative half-cycle signal of sinusoidal current. In either the positive or negative half cycles, only one power electronic switch is switched in high frequency to reduce switching loss. Further, the negative input terminal of the DC power input port of the invention can be connected to a neutral line of the single-phase utility system.
    Type: Grant
    Filed: August 27, 2009
    Date of Patent: February 7, 2012
    Inventors: Chin-Chang Wu, Chun-Han Chen, Ming-Sheng Kao, Li-Hsiang Lai, Ya-Tsung Feng
  • Patent number: 8076799
    Abstract: A UPS system includes one or more UPS units with identical or different capacities. A control circuit, used to control a DC/AC inverter of the UPS unit, includes a voltage feedback control circuit and a current feedforward control circuit. The voltage feedback control circuit is used to control the amplitude and the waveform of load voltage. The current feedforward control circuit is used to operate the DC/AC inverter of the UPS unit as a virtual fundamental resistor and a virtual harmonic resistor which are serially connected to an output terminal of the DC/AC inverter such that each UPS unit can be distributed to provide an output current according to the capacity ratio of the UPS system.
    Type: Grant
    Filed: August 19, 2008
    Date of Patent: December 13, 2011
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Chin-Chang Wu, Hung-Liang Chou, Yu-Hsiu Lin, Wen-Jie Hou, Han-Sheng Wei
  • Publication number: 20110260692
    Abstract: An estimation method for residual discharging time of batteries includes the steps of: providing a set of battery-discharge-current intervals and a set of battery-discharge equations, setting discharge time of each battery-discharge-current intervals zero; detecting a discharge current, voltage and time of batteries; judging whether the discharge current exceeding all of the battery-discharge-current intervals; selecting one of the battery-discharge-current intervals and the associated battery-discharge equation according to the detected discharge current; calculating an estimation of residual discharging time; accumulating and recording the discharge time; judging whether the discharge voltage being lower than a predetermined value and calculating an estimation error of the residual discharging time; adjusting parameters of the battery-discharge equation for reducing the estimation error of the residual discharging time if the estimation error is greater than a predetermined error value.
    Type: Application
    Filed: November 18, 2010
    Publication date: October 27, 2011
    Inventors: Hung-Liang Chou, Yu-Hua Sun, Chin-Chang Wu, Wen-Jung Chiang
  • Patent number: 8031497
    Abstract: A three-leg power converter apparatus including first, second and third input/output ports, a three-leg bridge converter, a filter circuit, a decoupling circuit and a controller is presented. The three-leg bridge converter has three single-leg circuits, two DC terminals connecting to two terminals of the first input/output port, and three mid-terminals with each of them being formed by a middle point of one of the three single-leg circuits. The controller connects to the three-leg bridge converter for controlling an input or output current passing through each DC terminal and mid-terminal. The filter circuit connects between two of the mid-terminals and the second input/output port. The decoupling circuit has two terminals connecting to the second input/output port and another terminal connecting to a terminal of the third input/output port, with the third input/output port having another terminal connecting to the other mid-terminal that dose not connect with the filter circuit.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: October 4, 2011
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Hung-Liang Chou, Yu-Hua Sun, Chin-Chang Wu, Ya-Tsung Feng
  • Patent number: 8009446
    Abstract: A ripple voltage suppression apparatus includes a DC/DC converter and a control circuit. The DC/DC converter has a power electronic switch. The control circuit has a voltage detector detecting a DC output voltage of the DC/DC converter, a ripple voltage suppression circuit receiving the detected DC output voltage to generate an AC control signal for controlling an AC component of a duty ratio of the power electronic switch, an output voltage regulation circuit receiving the detected DC output voltage to generate a DC control signal for controlling an DC component of a duty ratio, an adder adding the AC and DC control signals to form a combined control signal, and a PWM circuit converting the combined control signal into a PWM signal to control the power electronic switch. Only the DC output voltage of the DC/DC converter has to be detected for the control circuit.
    Type: Grant
    Filed: February 16, 2009
    Date of Patent: August 30, 2011
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Hung-Liang Chou, Jia-Min Shen, Chin-Chang Wu, Li-Hsiang Lai, Lung-Chi Yang, Ya-Tsung Feng
  • Patent number: 7843082
    Abstract: An islanding detection apparatus for a distributed generation power system and a detection method therefor operates a power converter to act as a virtual capacitor or inductor at a frequency close to but unequal to that of a utility power system under abnormal condition of the utility power system. When power failure occurs in the utility power system, only the distributed generation power system supplies power to a load so that a load voltage has been changed in at least one of amplitude and frequency which can be immediately detected islanding phenomenon.
    Type: Grant
    Filed: October 12, 2006
    Date of Patent: November 30, 2010
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Hung-Liang Chou, Wen-Jung Chiang, Chin-Chang Wu, Ya-Tsung Feng
  • Publication number: 20100254170
    Abstract: A DC to AC inverter has a DC power input port, a buck converter, a buck/boost converter, an output filter and an AC output port. The DC power input port has a positive input terminal and a negative input terminal, both connected to a DC source. The AC output port is connected to a single-phase utility system. When the single-phase utility system is in positive half cycle, the buck converter generates a positive half-cycle signal of sinusoidal current. When the single-phase utility system is in negative half cycle, the buck/boost converter generates a negative half-cycle signal of sinusoidal current. In either the positive or negative half cycles, only one power electronic switch is switched in high frequency to reduce switching loss. Further, the negative input terminal of the DC power input port of the invention can be connected to a neutral line of the single-phase utility system.
    Type: Application
    Filed: August 27, 2009
    Publication date: October 7, 2010
    Inventors: Chin-Chang Wu, Chun-Han Chen, Ming-Sheng Kao, Li-Hsiang Lai, Ya-Tsung Feng
  • Patent number: 7787267
    Abstract: An active power filter includes an energy storage capacitor, an inverter, a filtering circuit and a controller. The inverter is controlled to act as a virtual resister at a fundamental frequency for compensating for the power loss of the active power filter, to act as a virtual capacitor at a fundamental frequency for compensating for a fundamental reactive power of the load, and/or to generate a harmonic current for suppressing the harmonic currents of specific orders of the load.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: August 31, 2010
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Chin-Chang Wu, Hung-Liang Chou, Wen-Pin Hsu, Yu-Ting Kuo, Jiunn-Jye Yang