Patents by Inventor Chin Cheng Chen
Chin Cheng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11962847Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.Type: GrantFiled: November 9, 2022Date of Patent: April 16, 2024Assignee: MEDIATEK INC.Inventors: Chia-Hao Chang, You-Tsai Jeng, Kai-Wen Yeh, Yi-Cheng Chen, Te-Chuan Wang, Kai-Wen Cheng, Chin-Lung Lin, Tai-Lai Tung, Ko-Yin Lai
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Publication number: 20240097323Abstract: In some examples, a device can include an antenna to emit waves in a radiation pattern having a first beamwidth, a directional radiation control device located in a path of the waves, where the directional radiation control device is to receive the waves from the antenna and is shaped to cause the waves to be directed in a different radiation pattern having a second beamwidth that is larger than the first beamwidth.Type: ApplicationFiled: September 15, 2022Publication date: March 21, 2024Inventors: Chin-Hung Ma, Pai-Cheng Huang, Po Chao Chen, Shih-Huang Wu
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Patent number: 11936299Abstract: A transistor includes a gate structure over a substrate, wherein the substrate includes a channel region. The transistor further includes a source/drain (S/D) in the substrate adjacent to the gate structure. The transistor further includes a lightly doped drain (LDD) region adjacent to the S/D, wherein a dopant concentration in the first LDD is less than a dopant concentration in the S/D. The transistor further includes a doping extension region adjacent the LDD region, wherein the doping extension region extends farther under the gate structure than the LDD region, and a maximum depth of the doping extension region is 10-times to 30-times greater than a maximum depth of the LDD.Type: GrantFiled: September 21, 2020Date of Patent: March 19, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chu Fu Chen, Chi-Feng Huang, Chia-Chung Chen, Chin-Lung Chen, Victor Chiang Liang, Chia-Cheng Pao
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Publication number: 20240071888Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.Type: ApplicationFiled: August 28, 2022Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Chang Lin, Yen-Fu Su, Chin-Liang Chen, Wei-Yu Chen, Hsin-Yu Pan, Yu-Min Liang, Hao-Cheng Hou, Chi-Yang Yu
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Patent number: 11915992Abstract: A method for forming a package structure is provided, including forming an interconnect structure over a carrier substrate and forming a semiconductor die over a first side of the interconnect structure. A removable film is formed over the semiconductor die. The method includes forming a first stacked die package structure over the first side of the interconnect structure. A top surface of the removable film is higher than a top surface of the first stacked die package structure. The method includes forming a package layer, removing a portion of the package layer to expose a portion of the removable film, removing the removable film to form a recess, forming a lid structure over the semiconductor die and the first stacked die package structure. The lid structure has a main portion and a protruding portion disposed in the recess and extending from the main portion.Type: GrantFiled: February 24, 2022Date of Patent: February 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shin-Puu Jeng, Po-Yao Lin, Feng-Cheng Hsu, Shuo-Mao Chen, Chin-Hua Wang
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Publication number: 20220288075Abstract: Provided are methods and compositions for prevention or treatment of pain, e.g., stress-related pain. Also provided is a method for producing a non-human animal model for pain, the non-human animal model produced therefrom, and a method of screening an agent pharmaceutically active in prevention or treatment of pain using such non-human animal model.Type: ApplicationFiled: July 10, 2020Publication date: September 15, 2022Inventors: Chin-Cheng Chen, Chin-Hsien HUNG
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Publication number: 20170072650Abstract: An injection mold and an optical lens produced from the injection mold are provided. The injection mold includes a disk-type mold base and a nozzle. A mold cavity chamber is defined by the disk-type mold base. The mold cavity chamber includes an optically effective central runner and an optically ineffective annular runner. Moreover, plural spoiler structures are formed in the optically ineffective annular runner. While a melt is injected from the nozzle to the mold cavity chamber, the plural spoiler structures provide the functions of disturbing the melt flow and decreasing the velocity of the melt in the optically ineffective annular runner. Consequently, before the optically ineffective annular runner is completely filled with the melt, the optically effective central runner is completely filled with the melt. Since no defect is formed in an optically effective zone, the yield of the optical lens is enhanced.Type: ApplicationFiled: October 30, 2015Publication date: March 16, 2017Inventors: JYH-LONG CHERN, CHIH-MING YEN, CHIN-CHENG CHEN
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Patent number: 8666664Abstract: An electronic seal of the present invention includes a bolt. The bolt is used to mount on a door latch of a cargo and inserts into a shell. The shell is provided with a control circuit to actively send a warning signal as the bolt is moved. As such, the user of the electronic seal can be properly informed to prevent theft.Type: GrantFiled: November 27, 2009Date of Patent: March 4, 2014Assignee: Syris Technology Corp.Inventors: Chien-Sheng Chiu, Chin-Cheng Chen, Kuo-Liang Liao
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Publication number: 20110130987Abstract: An electronic seal of the present invention includes a bolt. The bolt is used to mount on a door latch of a cargo and inserts into a shell. The shell is provided with a control circuit to actively send a warning signal as the bolt is moved. As such, the user of the electronic seal can be properly informed to prevent theft.Type: ApplicationFiled: November 27, 2009Publication date: June 2, 2011Inventors: CHIEN-SHENG CHIU, CHIN-CHENG CHEN, KUO- LIANG LIAO
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Patent number: 6575223Abstract: A concealed type lifting control mechanism installed in a Venetian blind and adapted to control lifting of the lift cord of the Venetian blind comprises at least two take-up reel sets that provide a predetermined spring release force and are connected to the lift cord to impart a roll-up prestress to the lift cords for taking up the lift cords, a synchronizing transmission unit coupled to the at least two take-up reel sets for enabling the at least two take-up reel sets to be work synchronously, and a positioning device set provided between the take-up reel sets and moved between an engagement position and a release position to determine the provision of the roll-up prestress, for enabling the lift cords to be moved to adjust the Venetian blind to the desired elevation.Type: GrantFiled: January 29, 2002Date of Patent: June 10, 2003Assignees: Industrial Technology Research Institute, Nien Made Enterprise Co., Ltd.Inventors: Yung-Chen Chung, Ya-Wei Hsu, Chin Cheng Chen
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Patent number: 5349305Abstract: A sampled-data, current-mode circuit implements analog functions in a standard digital process. Among sampled-data current-mode circuits, the current S/H (CSH) circuit is a key component. This fully differential CSH circuit was implemented in a 1.2 .mu.m N-well double-poly double metal CMOS technology adapted to 8-bit resolution at a 15 MHz sampling rate.Type: GrantFiled: July 22, 1993Date of Patent: September 20, 1994Assignee: United Microelectronics CorporationInventors: Chun-Fang Hsiao, Chung-Yu Wu, Chin-Cheng Chen