Patents by Inventor Chin-Chiang Chang

Chin-Chiang Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240388288
    Abstract: A device including an inverter circuit, a hysteresis control circuit, and a high-side input level shifter. The inverter circuit having an output and including at least two series connected PMOS transistors connected, at the output, in series to at least two series connected NMOS transistors. The hysteresis control circuit coupled to the output to provide feedback to the at least two series connected PMOS transistors and to the at least two series connected NMOS transistors. The high-side input level shifter connected to gates of the at least two PMOS transistors and configured to shift a low level of an input signal to a higher level and provide the higher level to one or more of the gates of the at least two PMOS transistors.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 21, 2024
    Inventors: Yung-Shun Chen, Chin-Chiang Chang, Yung-Chow Peng
  • Patent number: 11869831
    Abstract: A semiconductor package includes a die attach pad, a plurality of lead terminals positioned about the die attach pad and disposed along side edges of the semiconductor package, a semiconductor die mounted on the die attach pad, a molding compound encapsulating the plurality of lead terminals and the semiconductor die, and at least one dummy lead disposed in a corner region of the semiconductor package between the plurality of lead terminals.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: January 9, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chin-Chiang Chang, Yin-Fa Chen, Shih-Chin Lin
  • Publication number: 20240006278
    Abstract: A multi-die QFN hybrid package includes a carrier having flip-chip leads and wire-bonding leads. A first die and a second die are mounted on the flip-chip leads, respectively, in a flip-chip manner. The first die is spaced apart from the second die. A third die is stacked over the first die and the second die. The third die is electrically connected to the wire-bonding leads around the first die and the second die through bond wires. A mold cap encapsulates the first die, the second die, the third die, the bond wires, and partially encapsulates the carrier. The flip-chip leads and the wire-bonding leads are exposed from a bottom mold cap surface.
    Type: Application
    Filed: May 23, 2023
    Publication date: January 4, 2024
    Applicant: MEDIATEK INC.
    Inventors: Hsin-Long Chen, Chin-Chiang Chang
  • Publication number: 20220328394
    Abstract: A three-dimensional pad structure includes a substrate; a pad disposed on the substrate, wherein a perimeter of the pad is covered with a solder mask; and at least one conductive pillar protruding from a top surface of the pad.
    Type: Application
    Filed: March 9, 2022
    Publication date: October 13, 2022
    Applicant: MEDIATEK INC.
    Inventor: Chin-Chiang Chang
  • Publication number: 20220115303
    Abstract: A semiconductor package includes a die attach pad, a plurality of lead terminals positioned about the die attach pad and disposed along side edges of the semiconductor package, a semiconductor die mounted on the die attach pad, a molding compound encapsulating the plurality of lead terminals and the semiconductor die, and at least one dummy lead disposed in a corner region of the semiconductor package between the plurality of lead terminals.
    Type: Application
    Filed: August 30, 2021
    Publication date: April 14, 2022
    Applicant: MEDIATEK INC.
    Inventors: Chin-Chiang Chang, Yin-Fa Chen, Shih-Chin Lin
  • Patent number: 11264309
    Abstract: A semiconductor package includes at least one die attach pad of a leadframe, at least one semiconductor die mounted on the at least one die attach pad; and a plurality of lead terminals disposed around the at least one die attach pad and electrically connected to respective input/output (I/O) pads on the at least one semiconductor die through a plurality of bond wires. The plurality of lead terminals comprises first lead terminals, second lead terminals, and third lead terminals, which are arranged in triple row configuration along at least one side of the semiconductor package. Each of the first lead terminals, second lead terminals, and third lead terminals has an exposed base metal on a cut end thereof.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: March 1, 2022
    Assignee: MEDIATEK INC.
    Inventor: Chin-Chiang Chang
  • Publication number: 20200402893
    Abstract: A semiconductor package includes at least one die attach pad of a leadframe, at least one semiconductor die mounted on the at least one die attach pad; and a plurality of lead terminals disposed around the at least one die attach pad and electrically connected to respective input/output (I/O) pads on the at least one semiconductor die through a plurality of bond wires. The plurality of lead terminals comprises first lead terminals, second lead terminals, and third lead terminals, which are arranged in triple row configuration along at least one side of the semiconductor package. Each of the first lead terminals, second lead terminals, and third lead terminals has an exposed base metal on a cut end thereof.
    Type: Application
    Filed: May 6, 2020
    Publication date: December 24, 2020
    Inventor: Chin-Chiang Chang
  • Patent number: 10037936
    Abstract: A semiconductor package includes a carrier substrate having a top surface, a semiconductor die mounted on the top surface, a plurality of bonding wires connecting the semiconductor die to the carrier substrate, an insulating material coated on the bonding wires, and a molding compound covering the top surface and encapsulating the semiconductor die, the plurality of bonding wires, and the insulating material.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: July 31, 2018
    Assignee: MediaTek Inc.
    Inventors: Shiann-Tsong Tsai, Hsueh-Te Wang, Chin-Chiang Chang
  • Patent number: 9905515
    Abstract: The present invention provides an integrated circuit (IC) package with stress releasing structure. The IC package comprises: a metal plane, a substrate, an IC chip, and an IC fill layer. The metal plane has at least one first etching line for separating the metal plane into a plurality of areas. The substrate is formed on metal layer. The IC chip is formed on the substrate, and the IC fill layer is formed around the IC chip. The at least one first etching line forms at least one half cut line in the metal plane and the substrate.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: February 27, 2018
    Assignee: MediaTek Inc.
    Inventors: Chin-Chiang Chang, Tao Cheng
  • Patent number: 9837595
    Abstract: The invention provides a portable electronic system. The portable electronic system includes a semiconductor package. The semiconductor package includes a substrate. A semiconductor die is coupled to the substrate. A thermoelectric device chip is disposed close to the semiconductor die, coupled to the substrate. The thermoelectric device chip is configured to detect a heat energy generated from the semiconductor die and to convert the heat energy into a recycled electrical energy. A power system is coupled to the semiconductor package, configured to store the recycled electrical energy.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: December 5, 2017
    Assignee: MEDIATEK INC.
    Inventors: Long-Kun Yu, Chin-Chiang Chang, Chia-Wei Chi, Chia-Feng Yeh, Tai-Yu Chen
  • Publication number: 20170125327
    Abstract: A semiconductor package includes a carrier substrate having a top surface, a semiconductor die mounted on the top surface, a plurality of bonding wires connecting the semiconductor die to the carrier substrate, an insulating material coated on the bonding wires, and a molding compound covering the top surface and encapsulating the semiconductor die, the plurality of bonding wires, and the insulating material.
    Type: Application
    Filed: June 8, 2016
    Publication date: May 4, 2017
    Inventors: Shiann-Tsong Tsai, Hsueh-Te Wang, Chin-Chiang Chang
  • Publication number: 20160343929
    Abstract: The invention provides a portable electronic system. The portable electronic system includes a semiconductor package. The semiconductor package includes a substrate. A semiconductor die is coupled to the substrate. A thermoelectric device chip is disposed close to the semiconductor die, coupled to the substrate. The thermoelectric device chip is configured to detect a heat energy generated from the semiconductor die and to convert the heat energy into a recycled electrical energy. A power system is coupled to the semiconductor package, configured to store the recycled electrical energy.
    Type: Application
    Filed: May 20, 2015
    Publication date: November 24, 2016
    Inventors: Long-Kun YU, Chin-Chiang CHANG, Chia-Wei CHI, Chia-Feng YEH, Tai-Yu CHEN
  • Patent number: 9319616
    Abstract: An audio/video (A/V) display system comprising a display and a peripheral device connected to the display. The display is capable of displaying a user interface. The peripheral device transmits raw data of the peripheral device to the display. The display enables an option corresponding to the peripheral device in the user interface after receiving the raw data of the peripheral device. Both the display and the peripheral device are controlled by a control device.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: April 19, 2016
    Assignee: AmTRAN TECHNOLOGY CO., LTD
    Inventors: Chin-Chiang Chang, Kuang-Cheng Chao, Wei-Wen Mai, Chien-Cheng Lin, Min-I Chen, Wen-Kang Wei
  • Publication number: 20160043040
    Abstract: The present invention provides an integrated circuit (IC) package with stress releasing structure. The IC package comprises: a metal plane, a substrate, an IC chip, and an IC fill layer. The metal plane has at least one first etching line for separating the metal plane into a plurality of areas. The substrate is formed on metal layer. The IC chip is formed on the substrate, and the IC fill layer is formed around the IC chip. The at least one first etching line forms at least one half cut line in the metal plane and the substrate.
    Type: Application
    Filed: April 15, 2015
    Publication date: February 11, 2016
    Inventors: Chin-Chiang Chang, Tao Cheng
  • Patent number: 8743293
    Abstract: An audio/video system includes a display having a plurality of input sources and a first peripheral device connected to one of the input sources. The display provides a user interface for receiving a switching command for switching current input source of the display among the input sources from a user, and the display automatically generates a first standby command to the first peripheral device when the received switching command is not switching the current input source to the input source corresponding to the first peripheral device.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: June 3, 2014
    Assignee: AmTran Technology Co., Ltd
    Inventors: Chin-Chiang Chang, Kuang-Cheng Chao, Wei-Wen Mai, Chien-Cheng Lin, Min-I Chen, Wen-Kang Wei
  • Publication number: 20140132838
    Abstract: An audio/video system includes a display having a plurality of input sources and a first peripheral device connected to one of the input sources. The display provides a user interface for receiving a switching command for switching current input source of the display among the input sources from a user, and the display automatically generates a first standby command to the first peripheral device when the received switching command is not switching the current input source to the input source corresponding to the first peripheral device.
    Type: Application
    Filed: March 4, 2013
    Publication date: May 15, 2014
    Applicant: AMTRAN TECHNOLOGY CO., LTD
    Inventors: Chin-Chiang Chang, Kuang-Cheng Chao, Wei-Wen Mai, Chien-Cheng Lin, Min-I Chen, Wen-Kang Wei
  • Publication number: 20140132839
    Abstract: An audio/video (A/V) display system comprising a display and a peripheral device connected to the display. The display is capable of displaying a user interface. The peripheral device transmits raw data of the peripheral device to the display. The display enables an option corresponding to the peripheral device in the user interface after receiving the raw data of the peripheral device. Both the display and the peripheral device are controlled by a control device.
    Type: Application
    Filed: March 13, 2013
    Publication date: May 15, 2014
    Applicant: AmTRAN TECHNOLOGY CO., LTD
    Inventors: Chin-Chiang Chang, Kuang-Cheng Chao, Wei-Wen Mai, Chien-Cheng Lin, Min-I Chen, Wen-Kang Wei