Patents by Inventor Chin Fang

Chin Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080285937
    Abstract: A video/audio display system includes a buffering module, a playing module and a controlling module. The buffering module temporarily stores video/audio data, which occupy a storage capacity of the buffering module. The playing module is electrically connected with the buffering module to play the video/audio data at a playing speed. The controlling module is electrically connected with the buffering module and the play module. A video/audio display method is also disclosed.
    Type: Application
    Filed: September 10, 2007
    Publication date: November 20, 2008
    Inventors: Chin-Fang Lee, Ming-Te Chou
  • Publication number: 20080244021
    Abstract: A spam resistant e-mail system employs communication via authenticated communication channels while providing a mechanism for rapidly growing a list of authenticated individuals and managing that list on a personal and collaborative basis to prevent spammers from joining the network.
    Type: Application
    Filed: June 29, 2007
    Publication date: October 2, 2008
    Inventor: Chin Fang
  • Patent number: 7428606
    Abstract: A keyboard, video monitor and mouse (KVM) Universal Serial Bus (USB) Internet protocol (IP) server interface pod (SIP) allows access to selected ones of a plurality of servers by a remotely located keyboard, video monitor and mouse. In addition, remote mounting of a USB device to the selected server is also possible. A digital KVM USB switch may be used for routing the remotely located keyboard, video monitor, mouse and USB device to the KVM USB IP SIP. The digital KVM USB switch also is coupled to a KVM USB IP interface. The KVM USB IP interface is located with and connected to the remotely located keyboard, video monitor, mouse and USB device. The KVM USB IP interface may be coupled to the digital KVM USB switch over a local area network (LAN), wide area network (WAN), or Internet.
    Type: Grant
    Filed: May 5, 2006
    Date of Patent: September 23, 2008
    Assignee: Dell Prodcuts L.P.
    Inventors: Tong Liu, Yung-Chin Fang
  • Publication number: 20080158422
    Abstract: A circuit, method and system for determining which type of video signal is to be generated by a media player are described herein. In the described embodiment, the media player has three video ports for transferring different types of video signal with each type of video signal requiring a predetermined number of ports for transferring its video signals, for example s-video requires two video ports. To determine which type of signal to generate, the detection circuit comprises a detector arranged to detect which of the video ports have a load coupled thereto, and is further arranged to control the media player to generate the type of video signal according to the number of ports detected that is coupled with the load.
    Type: Application
    Filed: January 3, 2007
    Publication date: July 3, 2008
    Applicant: CREATIVE TECHNOLOGY LTD
    Inventors: Johnson CHUA, Chin Fang LIM
  • Publication number: 20080005414
    Abstract: A keyboard, video monitor and mouse (KVM) Universal Serial Bus (USB) Internet protocol (IP) server interface pod (SIP) allows access to selected ones of a plurality of servers by a remotely located keyboard, video monitor and mouse. In addition, remote mounting of a USB device to the selected server is also possible. A digital KVM USB switch may be used for routing the remotely located keyboard, video monitor, mouse and USB device to the KVM USB IP SIP. The digital KVM USB switch also is coupled to a KVM USB IP interface. The KVM USB IP interface is located with and connected to the remotely located keyboard, video monitor, mouse and USB device. The KVM USB IP interface may be coupled to the digital KVM USB switch over a local area network (LAN), wide area network (WAN), or Internet.
    Type: Application
    Filed: May 5, 2006
    Publication date: January 3, 2008
    Inventors: Tong Liu, Yung-Chin Fang
  • Publication number: 20060285225
    Abstract: The invention relates to a zoom lens for DLP projector. The zoom lens of the invention comprises a focus group, a zoom group and a compensation group. The zoom group comprises three zoom units with positive, negative, positive optical power respectively. The compensation group comprises a first compensation unit, a second compensation unit, an aperture stop and a third compensation unit. Corresponding to the aperture stop, the compensation lens of the compensation units have positive radius, positive radius, positive radius and negative radius respectively. The zoom lens of the invention utilizes the zoom group and the compensation group so that firstly, the F-number of the zoom lens of the invention can be fixed at 2.2; secondly, the relative luminance of the zoom lens of the invention can be up to 60% even at extreme corner; thirdly, the tolerance of the zoom lens of the invention is comparatively excellent.
    Type: Application
    Filed: January 17, 2006
    Publication date: December 21, 2006
    Inventors: Yi-Chin Fang, Yao-Chien Cheng
  • Publication number: 20060287406
    Abstract: A foamed compound for medical articles has ingredients including ethylene vinyl acetate, filler, co-agent, crosslinking agent, blowing agent, and pigment. Wherein ethylene vinyl acetate, the filler, the co-agent, the crosslinking agent, the blowing agent, and the pigment are mixed together in a proper proportion and then foamed. By using foregoing ingredients to manufacture the high density foamed compound, the foamed compound causes no allergic response on the skin and can be applicable to medical articles. Moreover, the foamed compound is non-toxic and can be recycled without causing any pollution.
    Type: Application
    Filed: June 17, 2005
    Publication date: December 21, 2006
    Applicant: CHIN CHEN FUH ENTERPRISE CORP.
    Inventors: Tsung-Hung Tsai, Chin-Fang Chang
  • Publication number: 20060198386
    Abstract: Computing nodes, such as plural information handling systems configured as a High Performance Computing Cluster (HPCC), are managed with plural master nodes configured to have active-active interaction. A resource manager of each of the plural master nodes is operable to simultaneously assign computing node resources to job requests. Reservations are made by a job scheduler in a table of a storage common to the active-active master nodes to avoid conflicts between master nodes and then reserved computing resources are assigned for management by the reserving master node resource manager. A failure manager monitors the master nodes to detect a failure, such as by a lack of communication from a master node for a predetermined time, and recovers a failed master node by assigning the jobs associated with the failed master node to an operating master node.
    Type: Application
    Filed: March 1, 2005
    Publication date: September 7, 2006
    Inventors: Tong Liu, Onur Celebioglu, Yung-Chin Fang
  • Publication number: 20060037018
    Abstract: A system, method and software are disclosed for scheduling the dispatch of large data processing operations. In an exemplary embodiment, the software identifies a plurality of information handling system nodes to receive a first dispatch of data processing operations. Identification of the nodes is generally directed to selection of a plurality of nodes substantially evenly distributed across one or more bottleneck points in a node network. Following dispatch of data processing operations, throughput on the network, such as at a bottleneck point, is measured to determine whether network throughput is approaching a saturation threshold. If data throughput is approaching a saturation threshold, the software delays additional dispatches of data processing operations until network throughput regresses from the saturation threshold.
    Type: Application
    Filed: August 16, 2004
    Publication date: February 16, 2006
    Applicant: DELL PRODUCTS L.P.
    Inventors: Yung-Chin Fang, Jenwei Hsieh
  • Patent number: 6762886
    Abstract: A 10× ratio wide-angle zoom lens includes several lens sets which is made of several lenses with different focal lengths. It has a first lens set with a positive dioptre, a second lens set with a negative dioptre, a third lens set with a positive dioptre, and a fourth lens set with a positive dioptre. The second lens set further contains two lenses with negative dioptres and one lens with a positive dioptre. The lens with a positive dioptre has a non-spherical surface on the object side. The lens with a negative dioptre closer to the lens with a positive dioptre is cemented to the positive-dioptre lens. The fourth lens set contains a lens with a negative dioptre and two non-spherical surfaces. The wide-angle zoom lens moves the second and the fourth lens set along its optical axis to adjust its zoom and moves the fourth lens set to focus.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: July 13, 2004
    Assignee: Industrial Technology Research Institute
    Inventors: Yi-Chin Fang, Chao-Hsien Chen, Chen-Chin Cheng
  • Patent number: 6468813
    Abstract: A method of automatic identifying and skipping defective work pieces mainly utilizes a reject eye formed inside the die covering area on a substrate to automatically determine whether the skipping procedure is triggered or not. The method of the present invention comprises the steps of: finding and aligning the die eye of the die as well as the lead eye of the substrate; finding the reject eye when the die eye and the lead eye is evaluated as not being present; stopping the wire bonding operation and skipping to next work piece when the reject eye is located. The method of present invention is capable of automatically determining whether the skipping procedure is triggered or not thereby reducing operating down time and increasing throughput.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: October 22, 2002
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Te Tsung Chao, Hui Chin Fang
  • Patent number: 6457235
    Abstract: An integrated circuit device includes a substrate with a contact unit, an integrated circuit chip with a bonding pad unit, and a bonding wire interconnecting the bonding pad unit and the contact unit. The bonding wire has a electrical bonding contact attached to the bonding pad unit, a first extension portion extending from the electrical bonding contact in a direction that inclines slightly and upwardly relative to a plane of the substrate toward the contact unit, and a second extension portion extending from the first extension portion and attached to the contact unit.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: October 1, 2002
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Te-Tsung Chuo, Hui-Chin Fang
  • Publication number: 20020092670
    Abstract: A cable identification system and method according to which one or more rings, having identifying indicia thereon, extend around the cable, and a cover extends around the ring and has a window formed therein, so that rotation of the ring relative to the cover exposes the identifying indicia.
    Type: Application
    Filed: January 16, 2001
    Publication date: July 18, 2002
    Inventors: Yung-Chin Fang, Tau Leng, Jenwei Hsieh
  • Patent number: 6420657
    Abstract: A cable identification system and method according to which one or more rings, having identifying indicia thereon, extend around the cable, and a cover extends around the ring and has a window formed therein, so that rotation of the ring relative to the cover exposes the identifying indicia.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: July 16, 2002
    Assignee: Dell Products L.P.
    Inventors: Yung-Chin Fang, Tau Leng, Jenwei Hsieh
  • Patent number: 6405357
    Abstract: A method for positioning bond pads in a semiconductor die comprises the steps of (I) setting parameters including (a) setting a baseline pad pitch to a first value, (b) setting a first pad position equal to a first pad value and (c) providing a focal point; (II) determining a first angle between a first line through a center of the first pad position and the focal point and a second line through a center of the semiconductor die and normal to the edge; (III) determining a first pad spacing increment value equal to the first value divided by a cosine of the first angle; (IV) setting a second pad position equal to a second pad value, wherein the second pad value at least equals the first pad value plus the first value if both of the first bond pad and the second bond pad are ground pad or power pad with the same potential, else the second pad value at least equals the first pad value plus the first pad spacing increment value; and (V) using the first and second pad values to respectively position a first bond p
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: June 11, 2002
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Te Tsung Chao, Hui Chin Fang
  • Patent number: 6391759
    Abstract: A bonding method which prevents wire sweep and the wire structure thereof mainly provide the pre-shifted wire between the first bonding point and the second bonding point and counter to the mold flow from the side thus intensifying the strength of the wire structure and increasing the deformation space of the wire sustaining mold flow.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: May 21, 2002
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Te-Tsung Chao, Hui-Chin Fang
  • Patent number: 6291898
    Abstract: A BGA package includes a chip with an array pad design disposed on the upper surface of a substrate. The chip has a plurality of bonding pads located about the periphery thereof, and the bonding pads of the chip are positioned in three rows, an inner row, a middle row, and an outer row along the sides of the chip. Only power supply pads and ground pads are designed to be located in the outer row of bonding pads, and all of the I/O pads are designed to be located in the middle row of the bonding pads and the inner row of the bonding pads.
    Type: Grant
    Filed: March 27, 2000
    Date of Patent: September 18, 2001
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Yung I Yeh, Te Tsung Chao, Ya Ping Hung, Hui Chin Fang
  • Patent number: 5407532
    Abstract: Parallel metallization lines for a substrate of an electronic device, such as complementary bit (B and B) lines for an SRAM cell array, are formed by:forming a uniformly thick aluminum layer with an underlying and overlying dielectric oxide layer, the underlying oxide layer being located overlying the substrate,patterning the overlying oxide and the aluminum layers to form the aluminum bit line (B) with an overlying dielectric oxide layer on its top surface, typically by means of reactive ion etching,depositing a further dielectric oxide layer on the entire surface of the structure including the sidewalls of the aluminum bit line (B), andreactive ion etching the top surface of the oxide layer, whereby an oxide layer remains on the top and sidewall surfaces of the aluminum bit line (B) but not elsewhere.
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: April 18, 1995
    Assignee: AT&T Corp.
    Inventors: San-Chin Fang, Nadia Lifshitz
  • Patent number: 5181179
    Abstract: A new class of circuit simulation methods comprises a homotopy that is constructed by employing particular models of the nonlinear elements of the circuit and by including a randomizing component in the homotopy equation. In particular, the models of the non-linear elements are passive, in the sense that they contain no negative resistors and no voltage dependent sources. Also, the models are smooth enough to at least have well-defined first and second order derivatives. One such homotopy is (1-t)(Bx+a)+tF(x)=0, where B is a randomizing matrix and a is a randomizing vector, t is the continuation parameter, x is a vector of the circuit's node voltages, and F(x) is a set of equations such that F(x)=0 describes the circuit. Another is the homotopy (1-t)(F.sub.A (x)+a)+tF.sub.B (x)+.sigma.(t)(x-a) where F.sub.B (x)=0 describes the circuit whose dc operating point is sought, F.sub.A (x)=0 describes a circuit whose dc operating point is known, and .sigma.(t) is a function that is 0 at t=0 and t=1.
    Type: Grant
    Filed: July 25, 1990
    Date of Patent: January 19, 1993
    Assignee: AT&T Bell Laboratories
    Inventors: San-Chin Fang, Robert C. Melville, Ljiljana Trajkovic
  • Patent number: D358439
    Type: Grant
    Filed: May 18, 1994
    Date of Patent: May 16, 1995
    Inventor: Chin-Fang Chen