Abstract: A method for adjusting a set-up default value of a BIOS and a mainboard using the method are provided. The adjusting method used by the mainboard includes providing an original set-up default value and an adjusting table. The original set-up default value is adjusted according to the adjusting table, so as to obtain a customized set-up value, and to store the set-up value in a set-up value memory.

Abstract: A method for adjusting setup default value of a basic input output system (BIOS) and a main board are provided. The main board offers a BIOS memory which includes a boot block and a main block. The boot block includes an adjusting table, and the main block includes an original setup default value and a dynamic table. The adjusting table is used to read the dynamic table, and the original setup default value is adjusted to be a customized setup default value according to the adjusting table and the dynamic table. Afterwards, the customized setup default value is stored in a setup value memory.

Abstract: A method for adjusting setup default value of a basic input output system (BIOS) and a main board are provided. The main board offers a BIOS memory which includes a boot block and a main block. The boot block includes an adjusting table, and the main block includes an original setup default value and a dynamic table. The adjusting table is used to read the dynamic table, and the original setup default value is adjusted to be a customized setup default value according to the adjusting table and the dynamic table. Afterwards, the customized setup default value is stored in a setup value memory.

Abstract: A method for adjusting a set-up default value of a BIOS and a mainboard using the method are provided. The adjusting method used by the mainboard includes providing an original set-up default value and an adjusting table. The original set-up default value is adjusted according to the adjusting table, so as to obtain a customized set-up value, and to store the set-up value in a set-up value memory.

Abstract: A digital data transmission error checking method and system is proposed, which is designed for use with a data source unit and a data reception unit for providing a error checking function, and which is characterized by the use of an improved checksum algorithm that initially sets a checksum variable to a fixed value and then repetitively increases the value of the checksum value by adding the value of each data unit in the original digital data stream plus the resulted value of an exclusive-OR operation on the previous checksum value and the index number of the current data unit in the original digital data stream. This feature allows the reception side to determine whether there are erroneous bits in the received data stream even if the sequential order of the bytes in the original digital data stream is mistakenly disordered.

Abstract: A computer platform memory configuration on-board indicating method and system is proposed, which is designed for use with a computer platform, such as a network server, for providing a memory configuration on-board indicating function; and which is characterized by the capability of reading a set of embedded memory specification data from all the memory modules, then using the memory specification data to automatically set up a configuration scheme for these memory modules, and subsequently using the memory configuration data to correspondingly generate a set of light signals in a predefined pattern to indicate the current memory configuration of the network server. This feature allows network system management personnel to conveniently and quickly learn the current memory configuration of the network server simply by visually checking the pattern of the light signals on the system motherboard of the network server.

Abstract: A labeling system and method applicable to an electronic system with a storage unit and General Purpose Input/Output (GPIO) pins is proposed. First, a setting module sets a plurality of hardware version information and combinational logics of the GPIO pins each corresponding to a different hardware version information, and stores the contents being set in the storage unit of the server system, so that the combinational logics of signals of the GPIO pins can then be read by a reading module and the corresponding hardware version information can be retrieved by a version information retrieving module, thereby allowing fast and easy determination of the current hardware version of the electronic system.

Abstract: A computer platform setup configuration data backup handling method and system is proposed, which is designed for use in conjunction with a computer platform for providing the computer platform with a configuration data memory backup handling function, and which is characterized by the capability of making a backup copy of the setup configuration data stored in CMOS RAM (Complementary Metal Oxide Semiconductor, Random-Access Memory), such that in the event of a failure to the CMOS RAM, the backup copy of setup configuration data can be retrieved for initialization of the computer platform at startup. This feature allows the computer platform to be notwithstanding able to start up in the event of a failure to the CMOS RAM, thus allowing the computer platform having faulted CMOS RAM to be nevertheless operable to provide intended services without requiring the end user to ask for help from the manufacturer.

Abstract: A method for detecting a switching failure, applied to a system having a Base Management Controller (BMC), a BIOS and a CPU under an Intelligent Platform Management Interface (IPMI), so as to avoid failure when the BMC switches from a Fault Resilient Booting (FRB) 3 mechanism to a FRB 2 mechanism. The method at includes the steps of allowing the BMC to perform the FRB 3 mechanism when power-on of the system is detected; canceling the FRB 3 mechanism by the BMC after the BIOS code is obtained by the CPU and starting a timing process for counting a predetermined time; and if the BIOS sends a command to the BMC within the predetermined time to enable the FRB 2 mechanism for monitoring a Power On Self Test (POST) performed by the BIOS, the BMC disabling the self-generated timing process, otherwise establishing and storing a failure record.

Abstract: A computer platform memory configuration on-board indicating method and system is proposed, which is designed for use with a computer platform, such as a network server, for providing a memory configuration on-board indicating function; and which is characterized by the capability of reading a set of embedded memory specification data from all the memory modules, then using the memory specification data to automatically set up a configuration scheme for these memory modules, and subsequently using the memory configuration data to correspondingly generate a set of light signals in a predefined pattern to indicate the current memory configuration of the network server. This feature allows network system management personnel to conveniently and quickly learn the current memory configuration of the network server simply by visually checking the pattern of the light signals on the system motherboard of the network server.

Abstract: A host computer memory configuration data remote access method and system is proposed, which is designed for use with a client station and a host computer for the purpose of allowing a user at the client station to learn the current memory configuration of the host computer via the client station; and which is characterized by the capability of reading a set of embedded memory specification data from all the memory modules currently installed on the host computer, then using these memory specification data to automatically set up a suitable configuration for these memory modules, and subsequently transferring the memory configuration data to a host management control unit that is used to control the linking of the client station to the host computer. This feature allows network system management personnel to conveniently and quickly gain access to the memory configuration of the host computer from a client station.

Abstract: A digital data transmission error checking method and system is proposed, which is designed for use with a data source unit and a data reception unit for providing a error checking function, and which is characterized by the use of an improved checksum algorithm that initially sets a checksum variable to a fixed value and then repetitively increases the value of the checksum value by adding the value of each data unit in the original digital data stream plus the resulted value of an exclusive-OR operation on the previous checksum value and the index number of the current data unit in the original digital data stream. This feature allows the reception side to determine whether there are erroneous bits in the received data stream even if the sequential order of the bytes in the original digital data stream is mistakenly disordered.

Abstract: A programmable memory write protection method and system is proposed, which is designed for use with a computer platform equipped with a programmable memory unit such as a flash memory unit for providing the flash memory unit with a write protection function, and which is characterized by the utilization of identification code to check whether a client unit is authorized to gain access to a flash memory unit; if YES, the write request from the client unit is allowed, and whereas if NO, the write request from the client unit is disallowed. This feature can help protect the BIOS program stored in flash memory against hackers and virus programs without having to utilize the dual BIOS method that would require large layout space on circuit board to implement and also allows authorized upgrade to the BIOS program to be more convenient and efficient to implement than prior art.

Abstract: An electronic system redundant heat dissipating unit operability inspecting method and system is proposed, which is designed for use in conjunction with an electronic system equipped with a main heat dissipating unit and at least one redundant heat dissipating unit for providing the redundant heat dissipating unit with a periodic operability checking function; and which is characterized by the capability of periodically checking whether the redundant heat dissipating unit is in good operable state at predefined intervals, and if not, capable of generating an abnormal condition notification message in human-perceivable form for the purpose of notifying the system management personnel of the electronic system to take necessary maintenance tasks on the failed redundant heat dissipating unit. This feature ensures the electronic system to have an uninterrupted heat dissipating capability when the main heat dissipating unit fails.

Abstract: A data storage system and method is proposed for use with computer systems having a BIOS program. The data storage system includes a power-on setting parameter storage area adapted for storing power-on setting parameters for allowing the BIOS program to read the required parameters and run a POST procedure on starting the computer system; and a backup data storage area for generating a copy of power-on setting parameters stored in the power-on setting parameter storage area, and the stored power-on setting parameters will be updated according to changes made on the power-on setting parameters, such that in cases where the BIOS program is unable to run the POST procedure according to the stored power-on setting parameters, the updated power-on setting parameters stored in the backup data storage area can be used for running the POST procedure, thereby enabling the computer system to start and operate normally.