Patents by Inventor Chin-Hsien LU

Chin-Hsien LU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240146288
    Abstract: A system includes a measuring device, a processing device and a signal generating device. The measuring device is configured to measure a voltage difference between a first node and a second node. The processing device is coupled between the first node and the second node. The signal generating device is configured to provide a first clock signal to the processing device to adjust the voltage difference, configured to generate the first clock signal according to a first enable signal and a second clock signal, and configured to align an edge of the first enable signal with an edge of the second clock signal. A method and a device are also disclosed herein.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 2, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Che LU, Chin-Ming FU, Chih-Hsien CHANG
  • Patent number: 11961580
    Abstract: A sense amplifier includes a first pair of transistors having gate terminals respectively coupled to a first input terminal for receiving a first input signal and to a second input terminal for receiving a second input signal, source terminals coupled to a first power supply terminal, and drain terminals. The sense amplifier also includes a second pair of transistors having gate terminals coupled to a clock terminal, source terminals respectively coupled to the drain terminals of the first pair of transistors, and drain terminals. The sense amplifier also includes a third pair of transistors having gate terminals coupled to the clock terminal, drain terminals respectively coupled to the drain terminals of the second pair of transistors, and source terminals coupled to a second power supply terminal. In addition, the sense amplifier includes an output circuit coupled to the drain terminals of the second pair of transistors and having an output terminal.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Che Lu, Chin-Ming Fu, Chih-Hsien Chang
  • Patent number: 11953078
    Abstract: A gear module includes a rotating cylinder, a first planetary gear set, a second planetary gear set, a concave-convex structure, and a limit bearing set. The first planetary gear set is accommodated in the rotating cylinder and includes a driven gear; the second planetary gear set includes a positioning frame, second planetary gears pivoted to a positioning frame, a driven gear engaged with the second planetary gears, and the positioning frame has a through hole; the concave-convex structure includes a convex column extended from the rotating cylinder and a concave hole formed on the positioning frame, the convex column is plugged into the concave hole; the limit bearing set includes a first ball bearing sheathing the driven gear and mounted between the driven gear and the through hole, and a second ball bearing sheathing the convex column and mounted between the convex column and the concave hole.
    Type: Grant
    Filed: August 16, 2023
    Date of Patent: April 9, 2024
    Assignee: SHA YANG YE INDUSTRIAL CO., LTD.
    Inventors: Feng-Chun Tsai, Ming-Han Tsai, Chin-Fa Lu, Kai-Hsien Wang
  • Publication number: 20240085941
    Abstract: An impedance measurement circuit and an operating method thereof are provided. The impedance measurement circuit includes a current source, a voltage controlled oscillator (VCO), an operation circuit, and a first delay circuit. The current source, electrically connected to a power rail, is able to sink a current from the power rail according to the delayed clock signal. The VCO is configured to generate an oscillation signal according to a power voltage on the power rail. The operation circuit is electrically connected to the VCO and is configured to receive a sampling clock signal and the oscillation signal, sense the power voltage to generate a sampled signal, and accumulate the sampled signal to generate a measurement result. The first delay circuit, electrically connected to the current source and the operation circuit, is able to receive the sampling clock signal and transmit the delayed clock signal to the current source.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Che Lu, Chin-Ming Fu, Chih-Hsien Chang
  • Publication number: 20130285136
    Abstract: An apparatus of and method for making enhanced Schottky diodes having p-body regions operable to pinch a current flow path in a high-voltage n-well region and field plate structures operable to distribute an electric potential of the Schottky diode allow for a device with enhanced breakdown voltage properties. N-well regions implanted into the substrate over a p-type epitaxial layer may act as an anode of the Schottky diode and n-type well regions implanted in the high-voltage n-well regions may act as cathodes of the Schottky diode. The Schottky diode may also be used as a low-side mosfet structure device.
    Type: Application
    Filed: April 25, 2012
    Publication date: October 31, 2013
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chin-Hsien LU, Shuo-Lun TU, Chin-Wei CHANG, Ching-Lin CHAN, Ming-Tung LEE