Abstract: A semiconductor device includes a single diffusion break (SDB) structure dividing a fin-shaped structure into a first portion and a second portion, an isolation structure on the SDB structure, a first spacer adjacent to the isolation structure, a metal gate adjacent to the isolation structure, a shallow trench isolation (STI around the fin-shaped structure, and a second isolation structure on the STI. Preferably, a top surface of the first spacer is lower than a top surface of the isolation structure and a bottom surface of the first spacer is lower than a bottom surface of the metal gate.

Abstract: An integrated circuit (IC), a display device and an anti-interference method thereof are provided. The IC includes an input pad, a source driving circuit and an anti-interference circuit. The input pad receives an input signal comprising image data from the external. The source driving circuit is coupled to the input pad to receive the input signal. The anti-interference circuit is coupled to the input pad to provide a variable capacitance. The anti-interference circuit adjusts the variable capacitance from a normal capacitance value to at least one anti-interference capacitance value when an interference event occurs to the input signal. The anti-interference circuit maintains the variable capacitance at the normal capacitance value when the interference event does not occur.

Abstract: An output circuit of a driver includes a plurality of output nodes, a first output buffer group and a multiplexer. The first output buffer group is configured to output data to the plurality of output nodes, wherein each output buffer in the first output buffer group is configured to output data to at least two output nodes among the plurality of output nodes. The multiplexer, coupled between the plurality of output nodes and the first output buffer group, is configured to select to couple each output buffer in the first output buffer group to one of the plurality of output nodes.

Abstract: A driving circuit for driving a display panel is provided. The driving circuit includes a source driver. The source driver is configured to be controlled by a timing controller. The source driver is configured to adjust at least one of an operation frequency and a receiving bandwidth of a source driving circuit of the source driver when at least one of the timing controller and the source driver detects that an interference event occurs.

Abstract: A display driving apparatus with a power control circuit reducing power consumption includes: a shift register receiving a display data signal and outputting a plurality of data signals; a first latch receiving a Nth data signal of the plurality of data signals and outputting a first latched data signal according to a first gate driving signal; an analog signal processing circuit including a second latch coupling to the first latch and outputting a second latched data signal according to a second gate driving signal; a data comparator comparing the first latched data signal and the second latched data signal; and a power controller coupling to the data comparator and controlling a power level of the analog signal processing circuit.

Abstract: The invention provides a display panel driving apparatus and a driving method thereof. The display panel driving apparatus includes a source driver circuit and a timing controller circuit. The source driver circuit loads data to data lines of the display panel in load data periods. The timing controller circuit controls the source driver circuit for dynamically configuring a time length of one of the load data periods according to whether charge sharing occurs. When a charge sharing operation is not performed on at least two of the data lines in the load data period, the load data period has a first time length. When the charge sharing operation is performed on at least two of the data lines in the load data period, the load data period has a second time length longer than the first time length.

Abstract: A method of controlling image data includes the steps of: detecting a frame of image data to determine an image pattern of the frame of image data; and determining to output the frame of image data with one of a plurality of configurations according to the image pattern. Wherein, a first configuration among the plurality of configurations indicates that the frame of image data is outputted in a first sequence and a second configuration among the plurality of configurations indicates that the frame of image data is outputted in a second sequence different from the first sequence.

Abstract: A driving circuit for driving a display panel is provided. The driving circuit includes a source driver. The source driver is configured to be controlled by a timing controller. The source driver is configured to adjust at least one of an operation frequency and a receiving bandwidth of a source driving circuit of the source driver when at least one of the timing controller and the source driver detects that an interference event occurs.

Abstract: A timing controller and an anti-interference method thereof are provided. The timing controller includes a timing control circuit. The timing control circuit provides an input signal for controlling a source driver. When at least one of the timing control circuit and the source driver detects that an interference event occurs to the input signal, the timing control circuit is configured to adjust a frequency of a data signal or a clock signal from a normal operation frequency to at least one anti-interference frequency. The timing control signal is further configured to provide at least one of the data signal and the clock signal to the source driver.

Abstract: A timing controller and an operation method thereof are provided. The timing controller includes a transmitter circuit and a control circuit. The control circuit ends a normal mode and enter a swing boost mode when quality of data signal is detected to be deteriorated in the normal mode. In the swing boost mode, the control circuit boosts the swing of the data signal to be higher than a normal level of the data signal in the normal mode.

Abstract: Control methods of a channel setting module applied to a display panel are provided. The display panel has gate lines, source lines, and pixels. The pixels are arranged in matrix. The pixels disposed at the same row are electrically connected to the same gate line, and the pixels disposed at the same column are electrically connected to the same source line. The adoption of the channel setting module reduces the control signals required by the source lines. The channel setting module includes operational amplifiers and de-mux switches, and the control methods dynamically determine conduction states of the de-mux switches. The voltage outputs of the operational amplifiers are selectively outputted to the source lines, depending on conduction statuses of the de-mux switches. By applying the control methods, the interference between the source lines are reduced, and the instantaneous overshoots/undershoots of floating channels are depressed.

Abstract: A source driver of a display system includes a plurality of channels, and each of the plurality of channels includes a first latch, a second latch, an output driver and a comparator. The first latch receives a first data code and a second data code from a timing controller of the display system. The second latch receives the first data code from the first latch. The output driver is used for transmitting the first data code to a display panel of the display system. The comparator, coupled to the first latch, the second latch and the output driver, is used for comparing the first data code stored in the second latch with the second data code stored in the first latch, to generate a signal indicating a power level for the output driver to transmit the second data code.

Abstract: A control method, suitable for a display panel including M scan lines and a plurality of source lines, include following operations. M is a positive integer. M gate signals are generated sequentially in M time periods during a first display frame to the M scan lines of the display panel. A level of a data signal to one of the source lines is updated in the M time periods during the first display frame. N gate signals are generated in N time periods selected from the M time periods during a second display frame to N scan lines selected from the M scan lines. (M-N) gate signals are suspended during the second display frame. The level of the data signal is updated in the N time periods and is not updated in the (M-N) time periods during the second display frame. N is a positive integer smaller than M.

Abstract: An output circuit of a driver includes a plurality of output nodes, a first output buffer group and a multiplexer. The first output buffer group is configured to output data to the plurality of output nodes, wherein each output buffer in the first output buffer group is configured to output data to at least two output nodes among the plurality of output nodes. The multiplexer, coupled between the plurality of output nodes and the first output buffer group, is configured to select to couple each output buffer in the first output buffer group to one of the plurality of output nodes.

Abstract: A method for reducing operating temperature of a source driving circuit and a display system are provided. The method for reducing operating temperature of a source driving circuit includes enabling an over-temperature protection operation by the source driving circuit; and transmitting, by the source driving circuit, a first signal to a timing controller in response to detecting a temperature increasing to be higher than the first threshold temperature, wherein the timing controller is configured to operate a temperature reducing operation in response to receiving the first signal.

Abstract: A light guide plate provided for a luminous keyboard is disclosed. The light guide plate includes a main body, a first bump pair, a second bump pair, and many microstructure patterns. The main body has a light output surface and many press button installation areas defined thereon, each of the press button installation areas is arranged to fix a press key structure. The first bump pair and the second bump pair are integrally and seamlessly protruded from the main body. Each of the first bump pair has a first recess, and each of the second bump pair has a second recess. The first recess and the second recess are configured opposite to each other, and provided for assembling the press key structure. The microstructure patterns are formed next to the first and second bump pairs to abstract light by destructing the total reflection in the main body.

Abstract: A driving circuit and an anti-interference method thereof are provided. The driving circuit includes a source driver. The source driver is configured to be controlled by a timing controller. The source driver is configured to adjust at least one of an operation frequency and a receiving bandwidth of a source driving circuit of the source driver when at least one of the timing controller and the source driver detects that an interference event occurs.

Abstract: A timing controller and an anti-interference method thereof are provided. The timing controller includes a timing control circuit. The timing control circuit provides an input signal for controlling a source driver. When at least one of the timing control circuit and the source driver detects that an interference event occurs to the input signal, the timing control circuit is configured to adjust a frequency of a data signal or a clock signal from a normal operation frequency to at least one anti-interference frequency. The timing control signal is further configured to provide at least one of the data signal and the clock signal to the source driver.

Abstract: A control method for charging time sharing in a display apparatus, which includes receiving image data including a plurality of pixel data signals corresponding to a plurality of display driving periods, each display driving period associated with pixel data signals of a respective row of the display apparatus, calculating a plurality of gray variations corresponding to the plurality of display driving periods according to the plurality of pixel data signals, adjusting the plurality of display driving periods to generate a plurality of adjusted display driving periods according to the plurality of gray variations, and generating a gate clock signal according to the plurality of adjusted display driving periods.