Patents by Inventor Chin-Hung Hsu

Chin-Hung Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210326208
    Abstract: A method of collecting error logs according to the disclosure includes generating, during procedure of BIOS of a server, at least one BIOS error log based on detection of an error condition of one or more of hardware devices and a CPU, transmitting the at least one BIOS error log to a BMC, storing the at least one BIOS error log received from the CPU, packaging the at least one BIOS error log and at least one log that is generated by the BMC and that is related to BMC sensors to generate an error log file, and storing the error log file.
    Type: Application
    Filed: April 14, 2021
    Publication date: October 21, 2021
    Applicant: Jabil Circuit (Shanghai) Co., Ltd.
    Inventors: Chin Liang, Yen-Cheng Chang, Shuo-Hung Hsu
  • Patent number: 11152515
    Abstract: A manufacturing method of a semiconductor device includes the following steps. An opening is formed penetrating a dielectric layer on a semiconductor substrate. A stacked structure is formed on the dielectric layer. The stacked structure includes a first semiconductor layer partly formed in the opening and partly formed on the dielectric layer, a sacrificial layer formed on the first semiconductor layer, and a second semiconductor layer formed on the sacrificial layer. A patterning process is performed for forming a fin-shaped structure including the first semiconductor layer, the sacrificial layer, and the second semiconductor layer. An etching process is performed to remove the sacrificial layer in the fin-shaped structure. The first semiconductor layer in the fin-shaped structure is etched to become a first semiconductor wire by the etching process. The second semiconductor layer in the fin-shaped structure is etched to become a second semiconductor wire by the etching process.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: October 19, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chin-Hung Chen, Ssu-I Fu, Chih-Kai Hsu, Chun-Ya Chiu, Chia-Jung Hsu, Yu-Hsiang Lin
  • Patent number: 11145733
    Abstract: The present invention discloses a method for forming a semiconductor device with a reduced silicon horn structure. After a pad nitride layer is removed from a substrate, a hard mask layer is conformally deposited over the substrate. The hard mask layer is then etched and trimmed to completely remove a portion of the hard mask layer from an active area and a portion of the hard mask layer from an oblique sidewall of a protruding portion of a trench isolation region around the active area. The active area is then etched to form a recessed region. A gate dielectric layer is formed in the recessed region and a gate electrode layer is formed on the gate dielectric layer.
    Type: Grant
    Filed: September 27, 2020
    Date of Patent: October 12, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chin-Hung Chen, Chih-Kai Hsu, Ssu-I Fu, Chia-Jung Hsu, Chun-Ya Chiu, Yu-Hsiang Lin, Po-Wen Su, Chung-Fu Chang, Guang-Yu Lo, Chun-Tsen Lu
  • Patent number: 11146085
    Abstract: A charging system for an electric window covering, which includes a motorized assembly controlling the movement of the electric window covering, and a power supply device including a rechargeable power unit and a first remaining power detection circuit is disclosed. The charging system comprises a charging device which provides power to the power supply device, a comparison module, and a notification unit. The first remaining power detection circuit detects the potential magnitude of the power unit, and the detected value is transmitted to the comparison module to be compared. If the potential magnitude is less than a predetermined threshold, a warning is presented at a notification unit. By actively presenting the warning to the user when the power of the power unit is low, the power supply device and the charging system can achieve the objectives of providing an active notification and extending the run-time of the power unit.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: October 12, 2021
    Assignee: Nien Made Enterprise Co., Ltd.
    Inventors: Chao-Hung Nien, Jui-Pin Jao, Shih-Wei Hsu, Kao-Chang Hu, Chin-Chu Chiu
  • Publication number: 20210296182
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a fin-shaped structure thereon; forming a single diffusion break (SDB) structure in the substrate to divide the fin-shaped structure into a first portion and a second portion; forming a first gate structure on the SDB structure; forming an interlayer dielectric (ILD) layer around the first gate structure; transforming the first gate structure into a first metal gate; removing the first metal gate to form a first recess; and forming a dielectric layer in the first recess.
    Type: Application
    Filed: June 4, 2021
    Publication date: September 23, 2021
    Inventors: Chih-Kai Hsu, Ssu-I Fu, Chun-Ya Chiu, Chi-Ting Wu, Chin-Hung Chen, Yu-Hsiang Lin
  • Publication number: 20210296183
    Abstract: A semiconductor device includes a single diffusion break (SDB) structure dividing a fin-shaped structure into a first portion and a second portion, an isolation structure on the SDB structure, a first spacer adjacent to the isolation structure, and a metal gate adjacent to the isolation structure. Preferably, a top surface of the first spacer is lower than a top surface of the isolation structure and a bottom surface of the first spacer is lower than a bottom surface of the metal gate.
    Type: Application
    Filed: June 4, 2021
    Publication date: September 23, 2021
    Inventors: Chih-Kai Hsu, Ssu-I Fu, Chun-Ya Chiu, Chi-Ting Wu, Chin-Hung Chen, Yu-Hsiang Lin
  • Publication number: 20210233488
    Abstract: A driving circuit for driving a display panel is provided. The driving circuit includes a source driver. The source driver is configured to be controlled by a timing controller. The source driver is configured to adjust at least one of an operation frequency and a receiving bandwidth of a source driving circuit of the source driver when at least one of the timing controller and the source driver detects that an interference event occurs.
    Type: Application
    Filed: April 13, 2021
    Publication date: July 29, 2021
    Applicant: Novatek Microelectronics Corp.
    Inventors: Jen-Chieh Hu, Chin-Hung Hsu
  • Patent number: 11017740
    Abstract: A timing controller and an anti-interference method thereof are provided. The timing controller includes a timing control circuit. The timing control circuit provides an input signal for controlling a source driver. When at least one of the timing control circuit and the source driver detects that an interference event occurs to the input signal, the timing control circuit is configured to adjust a frequency of a data signal or a clock signal from a normal operation frequency to at least one anti-interference frequency. The timing control signal is further configured to provide at least one of the data signal and the clock signal to the source driver.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: May 25, 2021
    Assignee: Novatek Microelectronics Corp.
    Inventors: Jen-Chieh Hu, Chin-Hung Hsu
  • Patent number: 11004423
    Abstract: A timing controller and an operation method thereof are provided. The timing controller includes a transmitter circuit and a control circuit. The control circuit ends a normal mode and enter a swing boost mode when quality of data signal is detected to be deteriorated in the normal mode. In the swing boost mode, the control circuit boosts the swing of the data signal to be higher than a normal level of the data signal in the normal mode.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: May 11, 2021
    Assignee: Novatek Microelectronics Corp.
    Inventors: Syang-Yun Tzeng, Cheng-Kai Kuei, Chin-Hung Hsu
  • Patent number: 10991290
    Abstract: Control methods of a channel setting module applied to a display panel are provided. The display panel has gate lines, source lines, and pixels. The pixels are arranged in matrix. The pixels disposed at the same row are electrically connected to the same gate line, and the pixels disposed at the same column are electrically connected to the same source line. The adoption of the channel setting module reduces the control signals required by the source lines. The channel setting module includes operational amplifiers and de-mux switches, and the control methods dynamically determine conduction states of the de-mux switches. The voltage outputs of the operational amplifiers are selectively outputted to the source lines, depending on conduction statuses of the de-mux switches. By applying the control methods, the interference between the source lines are reduced, and the instantaneous overshoots/undershoots of floating channels are depressed.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: April 27, 2021
    Assignee: NOVATEK MICROELECTRONICS CORP.
    Inventors: Hsiu-Hui Yang, Yu-Shao Liu, Chin-Hung Hsu, Yen-Cheng Cheng
  • Patent number: 10957233
    Abstract: A control method, suitable for a display panel including M scan lines and a plurality of source lines, include following operations. M is a positive integer. M gate signals are generated sequentially in M time periods during a first display frame to the M scan lines of the display panel. A level of a data signal to one of the source lines is updated in the M time periods during the first display frame. N gate signals are generated in N time periods selected from the M time periods during a second display frame to N scan lines selected from the M scan lines. (M-N) gate signals are suspended during the second display frame. The level of the data signal is updated in the N time periods and is not updated in the (M-N) time periods during the second display frame. N is a positive integer smaller than M.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: March 23, 2021
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Te-Hsien Kuo, Chin-Hung Hsu
  • Patent number: 10957260
    Abstract: A source driver of a display system includes a plurality of channels, and each of the plurality of channels includes a first latch, a second latch, an output driver and a comparator. The first latch receives a first data code and a second data code from a timing controller of the display system. The second latch receives the first data code from the first latch. The output driver is used for transmitting the first data code to a display panel of the display system. The comparator, coupled to the first latch, the second latch and the output driver, is used for comparing the first data code stored in the second latch with the second data code stored in the first latch, to generate a signal indicating a power level for the output driver to transmit the second data code.
    Type: Grant
    Filed: July 23, 2017
    Date of Patent: March 23, 2021
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Cheng-Kai Kuei, Chin-Hung Hsu
  • Publication number: 20210020135
    Abstract: An output circuit of a driver includes a plurality of output nodes, a first output buffer group and a multiplexer. The first output buffer group is configured to output data to the plurality of output nodes, wherein each output buffer in the first output buffer group is configured to output data to at least two output nodes among the plurality of output nodes. The multiplexer, coupled between the plurality of output nodes and the first output buffer group, is configured to select to couple each output buffer in the first output buffer group to one of the plurality of output nodes.
    Type: Application
    Filed: July 17, 2019
    Publication date: January 21, 2021
    Inventors: Hsiu-Hui Yang, Yen-Cheng Cheng, Chin-Hung Hsu
  • Patent number: 10872579
    Abstract: A method for reducing operating temperature of a source driving circuit and a display system are provided. The method for reducing operating temperature of a source driving circuit includes enabling an over-temperature protection operation by the source driving circuit; and transmitting, by the source driving circuit, a first signal to a timing controller in response to detecting a temperature increasing to be higher than the first threshold temperature, wherein the timing controller is configured to operate a temperature reducing operation in response to receiving the first signal.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: December 22, 2020
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Sheng-Wen Lai, Te-Hsien Kuo, Han-Kun Wu, Chin-Hung Hsu
  • Patent number: 10775900
    Abstract: A light guide plate provided for a luminous keyboard is disclosed. The light guide plate includes a main body, a first bump pair, a second bump pair, and many microstructure patterns. The main body has a light output surface and many press button installation areas defined thereon, each of the press button installation areas is arranged to fix a press key structure. The first bump pair and the second bump pair are integrally and seamlessly protruded from the main body. Each of the first bump pair has a first recess, and each of the second bump pair has a second recess. The first recess and the second recess are configured opposite to each other, and provided for assembling the press key structure. The microstructure patterns are formed next to the first and second bump pairs to abstract light by destructing the total reflection in the main body.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: September 15, 2020
    Assignee: GLOBAL LIGHTING TECHNOLOGY INC.
    Inventors: Fan-Wei Wu, Chin-Hung Hsu
  • Patent number: 10762873
    Abstract: A driving circuit and an anti-interference method thereof are provided. The driving circuit includes a source driver. The source driver is configured to be controlled by a timing controller. The source driver is configured to adjust at least one of an operation frequency and a receiving bandwidth of a source driving circuit of the source driver when at least one of the timing controller and the source driver detects that an interference event occurs.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: September 1, 2020
    Assignee: Novatek Microelectronics Corp.
    Inventors: Jen-Chieh Hu, Chin-Hung Hsu
  • Publication number: 20200258472
    Abstract: A timing controller and an anti-interference method thereof are provided. The timing controller includes a timing control circuit. The timing control circuit provides an input signal for controlling a source driver. When at least one of the timing control circuit and the source driver detects that an interference event occurs to the input signal, the timing control circuit is configured to adjust a frequency of a data signal or a clock signal from a normal operation frequency to at least one anti-interference frequency. The timing control signal is further configured to provide at least one of the data signal and the clock signal to the source driver.
    Type: Application
    Filed: April 27, 2020
    Publication date: August 13, 2020
    Applicant: Novatek Microelectronics Corp.
    Inventors: Jen-Chieh Hu, Chin-Hung Hsu
  • Publication number: 20200243041
    Abstract: A timing controller and an operation method thereof are provided. The timing controller includes a transmitter circuit and a control circuit. The control circuit ends a normal mode and enter a swing boost mode when quality of data signal is detected to be deteriorated in the normal mode. In the swing boost mode, the control circuit boosts the swing of the data signal to be higher than a normal level of the data signal in the normal mode.
    Type: Application
    Filed: April 10, 2020
    Publication date: July 30, 2020
    Applicant: Novatek Microelectronics Corp.
    Inventors: Syang-Yun Tzeng, Cheng-Kai Kuei, Chin-Hung Hsu
  • Publication number: 20200234669
    Abstract: A method of controlling image data includes the steps of: detecting a frame of image data to determine an image pattern of the frame of image data; and determining to output the frame of image data with one of a plurality of configurations according to the image pattern. Wherein, a first configuration among the plurality of configurations indicates that the frame of image data is outputted in a first sequence and a second configuration among the plurality of configurations indicates that the frame of image data is outputted in a second sequence different from the first sequence.
    Type: Application
    Filed: July 1, 2019
    Publication date: July 23, 2020
    Inventors: Te-Hsien Kuo, Chin-Hung Hsu
  • Patent number: 10643574
    Abstract: A timing controller and an operation method thereof are provided. The timing controller includes a transmitter circuit and a control circuit. The control circuit ends a normal mode to enter a swing boost mode when a lock signal fed back by a source driving circuit indicates that quality of data signal is deteriorated in the normal mode. In the swing boost mode, the control circuit controls the transmitter circuit to boost the swing of the data signal from a normal level to a high level. The control circuit ends the swing boost mode and enters a clock training mode when the source driving circuit causes loss of lock to the data signal in the swing boost mode. In the clock training mode, the control circuit controls the transmitter circuit to employ a clock training data string as the data signal to transmit to the source driving circuit.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: May 5, 2020
    Assignee: Novatek Microelectronics Corp.
    Inventors: Syang-Yun Tzeng, Cheng-Kai Kuei, Chin-Hung Hsu