Abstract: A power management method for use in an electronic system is provided. The electronic system has a processor and a power management unit. The method has the steps of: when the processor has entered a low power state and an awakening event occurs, calculating a staying time from the time point the processor enters the low power state till the time point the awakening event occurs, wherein the operation voltage of the processor is at a first voltage level in the low power state; and when the processing starts to exit the low power state according to the awakening event, determining a wait time, during which the operation voltage of the processor is recovered to a second voltage level of a working state from the first voltage level, wherein the first voltage level is lower than the second voltage level.

Abstract: A computer system is provided. In one embodiment, the computer system includes a memory, a peripheral device, a central processing unit (CPU), and a peripheral device controller. The CPU stores information about the data transmission in a descriptor in the memory when data transmission between the CPU and the peripheral device is required. The peripheral device controller reads the descriptor from the memory at an access frequency, records whether the descriptor read from the memory requests for data transmission as a recording result, and adjusts the access frequency according to the recording result.

Abstract: An operating system switching method is provided. The operating system switching method is for a computer system comprising a control unit, a memory unit, and a storage unit, wherein the storage unit comprises a first operating system and a second operating system. The steps of the method include: loading the first operating system and the second operating system into a first memory space and a second memory space of the memory unit, respectively, and setting the first memory space and the second memory space to a working state and a standby state, respectively; and performing a first switching of the operating systems, and setting the first memory space and the second memory space to the standby state and the working state.

Abstract: A power management method for use in an electronic system is provided. The electronic system has a processor and a power management unit. The method has the steps of: when the processor has entered a low power state and an awakening event occurs, calculating a staying time from the time point the processor enters the low power state till the time point the awakening event occurs, wherein the operation voltage of the processor is at a first voltage level in the low power state; and when the processing starts to exit the low power state according to the awakening event, determining a wait time, during which the operation voltage of the processor is recovered to a second voltage level of a working state from the first voltage level, wherein the first voltage level is lower than the second voltage level.

Abstract: An operating system switching method is provided. The operating system switching method is for a computer system comprising a control unit, a memory unit, and a storage unit, wherein the storage unit comprises a first operating system and a second operating system. The steps of the method include: loading the first operating system and the second operating system into a first memory space and a second memory space of the memory unit, respectively, and setting the first memory space and the second memory space to a working state and a standby state, respectively; and performing a first switching of the operating systems, and setting the first memory space and the second memory space to the standby state and the working state.

Abstract: A computer system is provided. In one embodiment, the computer system includes a memory, a peripheral device, a central processing unit (CPU), and a peripheral device controller. The CPU stores information about the data transmission in a descriptor in the memory when data transmission between the CPU and the peripheral device is required. The peripheral device controller reads the descriptor from the memory at an access frequency, records whether the descriptor read from the memory requests for data transmission as a recording result, and adjusts the access frequency according to the recording result.

Abstract: A computer system having low-power operation includes a controller in communication with a first storage device and a second storage device. The controller can be configured to periodically retrieve dynamic frame data from a first storage device during a time period when the computer system is not in an idle state. During a time period when the computer system is in an idle state, the controller is configured to store static frame data into a second storage device, and repeatedly retrieve the static frame data from the second storage device to display an image represented by the static frame data during a time when the computer system continues to be in the idle state.