Abstract: A method of fabricating a thin film transistor is disclosed. First, a substrate is provided and a patterned polysilicon layer is formed on the substrate. A metal layer is formed on the patterned polysilicon layer. Then, a portion of the metal layer is removed so that the remaining metal layer beside the patterned polysilicon layer forms a source and a drain. A gate insulation layer is formed on the substrate to cover the source, the drain and the patterned polysilicon layer. A gate is formed on the gate insulation layer over the patterned polysilicon layer.

Abstract: A method of fabricating a thin film transistor is disclosed. First, a substrate is provided and a patterned polysilicon layer is formed on the substrate. A metal layer is formed on the patterned polysilicon layer. Then, a portion of the metal layer is removed so that the remaining metal layer beside the patterned polysilicon layer forms a source and a drain. A gate insulation layer is formed on the substrate to cover the source, the drain and the patterned polysilicon layer. A gate is formed on the gate insulation layer over the patterned polysilicon layer.

Abstract: A method of fabricating a thin film transistor is disclosed. First, a substrate is provided and a patterned polysilicon layer is formed on the substrate. A metal layer is formed on the patterned polysilicon layer. Then, a portion of the metal layer is removed so that the remaining metal layer beside the patterned polysilicon layer forms a source and a drain. A gate insulation layer is formed on the substrate to cover the source, the drain and the patterned polysilicon layer. A gate is formed on the gate insulation layer over the patterned polysilicon layer.

Abstract: A method for manufacturing a substrate of a flat panel display device is disclosed. The method includes following steps: providing a substrate having patterned transparent electrode thereon; and forming an alignment layer on the surface of the transparent electrode. The formed alignment layer includes a homeotropic alignment film and a homogeneous alignment film adjacent to the homeotropic alignment film. Moreover, the homeotropic alignment film is formed utilizing printing on or on a periphery of to the homogeneous alignment film. Through this method, the flat panel display device can be manufactured without increasing the quantity of the mask cycles, and without a complex process of gradation exposure. Moreover, the problem resulted from multiple rubbing can be reduced, and the cost for manufacturing can be decreased.

Abstract: An apparatus for producing an atomic beam comprising an ionization chamber, an ion beam drawing device, a neutralization chamber and a voltage regulating device is provided. The ionization chamber generates an ion beam and the ion beam drawing device draws the ion beam out from the ionization chamber. The neutralization chamber and the voltage regulating device are disposed on the path of the ion beam. Moreover, the ion beam drawing device is disposed between the ionization chamber and the neutralization chamber and the voltage regulating device is disposed between the ion beam drawing device and the neutralization chamber. The energy of the ion beam can be reduced by the voltage regulating device. The ion beam is neutralized to a neutral atomic beam after passing through the neutralization chamber. Therefore, the apparatus for producing the atomic beam provided in this invention can effectively produce the neutral atomic beam.

Abstract: A method of fabricating an active device array substrate is provided. First, a substrate is provided. A pixel array is formed on the substrate. An alignment material layer having a plurality of alignment regions is formed on the pixel array. A mask layer is formed on a portion of the alignment regions on the alignment material layer by using an inkjet printing process, so as to expose another portion of the alignment regions on the alignment material layer. Then, a particle beam alignment process is performed to the exposed alignment material layer. Then, the mask layer is removed. Another mask layer is formed on the alignment material layer which has been treated by the particle beam to expose the alignment material layer not treated by the particle beam. Another particle beam alignment process is performed to the exposed alignment material layer, and then the another mask layer is removed.

Abstract: A method for manufacturing a lower substrate of a liquid crystal display device is disclosed and more particularly, a method for manufacturing a color filter layer on a lower substrate is disclosed. This method is achieved by using a photosensitive insulating layer as a passivation layer or an overcoat of a thin film transistor to reduce the number of masks, or of photographic steps. The photosensitive insulating layer used in the method has the characteristics of both photoresist and passivation layers so as to protect a thin film transistor from moisture and oxygen. In addition, the number of masks, or of photographic steps used in this method can be further reduced by ink-jet printing a color filter layer or by half-tone mask technique.

Abstract: A method of fabricating a thin film transistor is disclosed. First, a substrate is provided and a patterned polysilicon layer is formed on the substrate. A metal layer is formed on the patterned polysilicon layer. Then, a portion of the metal layer is removed so that the remaining metal layer beside the patterned polysilicon layer forms a source and a drain. A gate insulation layer is formed on the substrate to cover the source, the drain and the patterned polysilicon layer. A gate is formed on the gate insulation layer over the patterned polysilicon layer.

Abstract: A method of fabricating a thin film transistor is disclosed. First, a substrate is provided and a patterned polysilicon layer is formed on the substrate. A metal layer is formed on the patterned polysilicon layer. Then, a portion of the metal layer is removed so that the remaining metal layer beside the patterned polysilicon layer forms a source and a drain. A gate insulation layer is formed on the substrate to cover the source, the drain and the patterned polysilicon layer. A gate is formed on the gate insulation layer over the patterned polysilicon layer.

Abstract: A method for manufacturing a lower substrate of a liquid crystal display device is disclosed and more particularly, a method for manufacturing a color filter layer on a lower substrate is disclosed. This method is achieved by using a photosensitive insulating layer as a passivation layer or an overcoat of a thin film transistor to reduce the number of masks, or of photographic steps. The photosensitive insulating layer used in the method has the characteristics of both photoresist and passivation layers so as to protect a thin film transistor from moisture and oxygen. In addition, the number of masks, or of photographic steps used in this method can be further reduced by ink-jet printing a color filter layer or by half-tone mask technique.

Abstract: A method of fabricating an active device array substrate is provided. First, a substrate is provided. A pixel array is formed on the substrate. An alignment material layer having a plurality of alignment regions is formed on the pixel array. A mask layer is formed on a portion of the alignment regions on the alignment material layer by using an inkjet printing process, so as to expose another portion of the alignment regions on the alignment material layer. Then, a particle beam alignment process is performed to the exposed alignment material layer. Then, the mask layer is removed. Another mask layer is formed on the alignment material layer which has been treated by the particle beam to expose the alignment material layer not treated by the particle beam. Another particle beam alignment process is performed to the exposed alignment material layer, and then the another mask layer is removed.

Abstract: A thin film transistor, comprising a first N-type LDD (Lightly Doped Drain) and a second N-type LDD, is provided. The two N-type LDDs are formed in a semiconductor layer by tilted implantation with a gate electrode serving as a mask. The two N-type LDDs are adjacent to source/drain regions, respectively. The thin film transistor further comprises a third P-type LDD and a fourth P-type LDD. The two P-type LDDs are formed in a semiconductor layer by tilted implantation with a gate electrode serving as a mask. The source/drain regions and the two N-type LDDs are surrounded by the two P-type LDDs, respectively.

Abstract: A method of fabricating a thin film transistor is disclosed. First, a substrate is provided and a patterned polysilicon layer is formed on the substrate. A metal layer is formed on the patterned polysilicon layer. Then, a portion of the metal layer is removed so that the remaining metal layer beside the patterned polysilicon layer forms a source and a drain. A gate insulation layer is formed on the substrate to cover the source, the drain and the patterned polysilicon layer. A gate is formed on the gate insulation layer over the patterned polysilicon layer.

Abstract: A method for manufacturing a substrate of a flat panel display device is disclosed. The method includes following steps: providing a substrate having patterned transparent electrode thereon; and forming an alignment layer on the surface of the transparent electrode. The formed alignment layer includes a homeotropic alignment film and a homogeneous alignment film adjacent to the homeotropic alignment film. Moreover, the homeotropic alignment film is formed utilizing printing on or on a periphery of to the homogeneous alignment film. Through this method, the flat panel display device can be manufactured without increasing the quantity of the mask cycles, and without a complex process of gradation exposure. Moreover, the problem resulted from multiple rubbing can be reduced, and the cost for manufacturing can be decreased.

Abstract: A pixel structure is provided, which includes a substrate, a thin film transistor (TFT), a capacitor, a protection layer and a pixel electrode. The substrate has an active device region and a capacitor region and a plurality of openings are formed within the capacitor region. Besides, the TFT is disposed within the active device region, while the capacitor is disposed within the capacitor region and formed on the openings. The protection layer covers the TFT and the capacitor. The pixel electrode is disposed on the protection layer and electrically connected to the TFT and the capacitor.

Abstract: An apparatus for producing an atomic beam comprising an ionization chamber, an ion beam drawing device, a neutralization chamber and a voltage regulating device is provided. The ionization chamber generates an ion beam and the ion beam drawing device draws the ion beam out from the ionization chamber. The neutralization chamber and the voltage regulating device are disposed on the path of the ion beam. Moreover, the ion beam drawing device is disposed between the ionization chamber and the neutralization chamber and the voltage regulating device is disposed between the ion beam drawing device and the neutralization chamber. The energy of the ion beam can be reduced by the voltage regulating device. The ion beam is neutralized to a neutral atomic beam after passing through the neutralization chamber. Therefore, the apparatus for producing the atomic beam provided in this invention can effectively produce the neutral atomic beam.

Abstract: A method for forming a thin film transistor. A buffer layer is formed on a substrate. A single crystal layer is formed on the buffer layer. An amorphous layer is formed on the single crystal layer. The amorphous layer is transferred to a crystallized layer by laser annealing. A gate dielectric layer is formed on the crystallized layer. A gate electrode is formed on the gate dielectric layer, wherein the crystallized layer is a single crystal layer or a polycrystal layer.

Abstract: A method of fabricating a liquid crystal display device comprises the following steps. A first N-type LDD (Lightly Doped Drain) and a second N-type LDD are formed in a semiconductor layer by tilted ion implantation with a gate electrode serving as a mask. The two N-type LDDs are adjacent to source/drain regions, respectively. In addition, a third P-type LDD and a fourth P-type LDD are formed in a semiconductor layer by tilted ion implantation with a gate electrode serving as a mask as well. The two P-type LDDs are adjacent to the source/drain regions and the two N-type LDDs, respectively.

Abstract: A thin film transistor, comprising a first N-type LDD (Lightly Doped Drain) and a second N-type LDD, is provided. The two N-type LDDs are formed in a semiconductor layer by tilted implantation with a gate electrode serving as a mask. The two N-type LDDs are adjacent to source/drain regions, respectively. The thin film transistor further comprises a third P-type LDD and a fourth P-type LDD. The two P-type LDDs are formed in a semiconductor layer by tilted implantation with a gate electrode serving as a mask. The source/drain regions and the two N-type LDDs are surrounded by the two P-type LDDs, respectively.