Patents by Inventor Chin-Sheng Wang

Chin-Sheng Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230420818
    Abstract: A multi-layered resonator circuit structure and a multi-layered filter circuit structure. The multi-layered resonator circuit structure includes a multi-layered substrate, a plurality of resonators and a plurality of conductive components. The multi-layered substrate has a top surface, a bottom surface, and a ground layer. The top surface and the bottom surface face away from each other. The ground layer is located between the top surface and the bottom surface. A part of the plurality of resonators is/are disposed on the top surface. Another part of the plurality of resonators is/are disposed on the bottom surface. The plurality of conductive components is located in the multi-layered substrate. The plurality of resonators is electrically connected to the ground layer, respectively, via the plurality of conductive components.
    Type: Application
    Filed: March 14, 2023
    Publication date: December 28, 2023
    Applicants: UNIMICRON TECHNOLOGY CORP., TUNGHAI UNIVERSITY
    Inventors: Chi-Feng CHEN, Po-Sheng YEN, Ruey-Beei WU, Ra-Min TAIN, Chin-Sheng WANG, Jun-Ho CHEN
  • Publication number: 20230417836
    Abstract: A detection system and an operating method are provided. The detection system is used to estimate a degradation state of a battery device. The detection system includes a first operation circuit, a second operation circuit, and a processor. The first operation circuit receives voltage timing data of the battery device, and calculates a first reference value of the battery device according to the voltage timing data. The second operation circuit receives temperature timing data of the battery device, and calculates a second reference value of the battery device according to the temperature timing data. The processor provides state data related to the degradation state according to the first reference value and the second reference value.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 28, 2023
    Applicant: AMIDAS Energy CO., LTD.
    Inventor: Chin Sheng Wang
  • Publication number: 20230335506
    Abstract: An electronic packaging structure including a first circuit structure, a second circuit structure and at least one electronic device is provided. The first circuit structure includes a bottom conductive plate having at least one cavity. The first circuit structure is disposed on the second circuit structure. The first circuit structure and the second circuit structure are electrically connected to each other. The electronic device is disposed on the second circuit structure. The electronic device is disposed corresponding to the cavity of the first circuit structure.
    Type: Application
    Filed: June 20, 2023
    Publication date: October 19, 2023
    Applicant: Unimicron Technology Corp.
    Inventors: Chin-Sheng Wang, Ra-Min Tain, Chih-Kai Chan
  • Publication number: 20230335419
    Abstract: The present invention provides an etching device which comprises an oxygen supplier, so that the etching device of the present invention can etch copper gently by means of the dissolved oxygen in the etching solution to accurately control the etching degree so as to fulfill the stricter requirements of microcircuit manufacturing. The present invention further provides an etching method. Finally, the etching waste solution of the present invention can be recycled to further ameliorate the environmental pollution and reduce the production cost, so the present invention is widely applicable in integrated circuit packaging.
    Type: Application
    Filed: May 11, 2022
    Publication date: October 19, 2023
    Inventors: Chin-Sheng Wang, Chia-Yu Peng, KAI-MING YANG, PU-JU LIN, CHENG-TA KO
  • Publication number: 20230335466
    Abstract: An electronic packaging structure including a first circuit structure, a second circuit structure and at least one electronic device is provided. The bottom side of the first circuit structure has at least one cavity. The first circuit structure is disposed on the second circuit structure. The first circuit structure and the second circuit structure are electrically connected to each other. The electronic device is disposed on the second circuit structure. The electronic device is disposed corresponding to the cavity of the first circuit structure.
    Type: Application
    Filed: June 20, 2023
    Publication date: October 19, 2023
    Applicant: Unimicron Technology Corp.
    Inventors: Chin-Sheng Wang, Ra-Min Tain, Chih-Kai Chan, Jun-Ho Chen
  • Publication number: 20230268257
    Abstract: An electronic package structure and its manufacturing method are provided. The electronic package structure includes an interposer, a circuit board, a chip, and a circuit structure. The interposer includes an interposer substrate and a coaxial conductive element located in the interposer substrate. The interposer substrate includes a cavity. The coaxial conductive element includes a first conductive structure, a second conductive structure surrounding the first conductive structure, and a first insulation structure. The first insulation structure is disposed between the first and second conductive structures. The circuit board is disposed on a lower surface of the interposer substrate and electrically connected to the coaxial conductive element. The chip is disposed in the cavity and located on the circuit board, so as to be electrically connected to the circuit board.
    Type: Application
    Filed: September 5, 2022
    Publication date: August 24, 2023
    Applicant: Unimicron Technology Corp.
    Inventors: Chin-Sheng Wang, Ra-Min Tain, Wen-Yu Lin, Tse-Wei Wang, Jun-Ho Chen, Guang-Hwa Ma
  • Publication number: 20230268256
    Abstract: An electronic package structure and manufacturing method thereof. The electronic package structure includes a circuit board, an interposer, a chip, a circuit structure, and a coaxial conductive element. The interposer is disposed on the circuit board. The interposer has a through groove. The chip is disposed in the through groove and located on the circuit board to electrically connect with the circuit board. The circuit structure is disposed on the interposer. The coaxial conductive element penetrates the interposer to electrically connect the circuit structure and the circuit board. The coaxial conductive element includes a first conductive structure, a second conductive structure, and a first insulating structure. The second conductive structure surrounds the first conductive structure. The first insulating structure is disposed between the first conductive structure and the second conductive structure.
    Type: Application
    Filed: August 18, 2022
    Publication date: August 24, 2023
    Applicant: Unimicron Technology Corp.
    Inventors: Chin-Sheng Wang, Ra-Min Tain, Wen-Yu Lin, Tse-Wei Wang, Jun-Ho Chen, Guang-Hwa Ma
  • Patent number: 11715715
    Abstract: A manufacturing method of a metal bump structure is provided. A driving base is provided. At least one pad and an insulating layer are formed on the driving base. The pad is formed on an arrangement surface of the driving base and has an upper surface. The insulating layer covers the arrangement surface of the driving base and the pad, and exposes a part of the upper surface of the pad. A patterned metal layer is formed on the upper surface of the pad exposed by the insulating layer, and extends to cover a part of the insulating layer. An electro-less plating process is performed to form at least one metal bump on the patterned metal layer. A first extension direction of the metal bump is perpendicular to a second extension direction of the driving base.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: August 1, 2023
    Assignee: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Ming-Ru Chen, Cheng-Chung Lo, Chin-Sheng Wang, Wen-Sen Tang
  • Publication number: 20230240023
    Abstract: A circuit board structure includes a circuit substrate having opposing first and second sides, a redistribution structure disposed at the first side, and a dielectric structure disposed at the second side. The circuit substrate includes a first circuit layer disposed at the first side and a second circuit layer disposed at the second side. The redistribution structure is electrically coupled to the circuit substrate and includes a first leveling dielectric layer covering the first circuit layer, a first thin-film dielectric layer disposed on the first leveling dielectric layer and having a material different from the first leveling dielectric layer, and a first redistributive layer disposed on the first thin-film dielectric layer and penetrating through the first thin-film dielectric layer and the first leveling dielectric layer to be in contact with the first circuit layer. The dielectric structure includes a second leveling dielectric layer disposed below the second circuit layer.
    Type: Application
    Filed: March 2, 2022
    Publication date: July 27, 2023
    Applicant: Unimicron Technology Corp.
    Inventors: Wen-Yu Lin, Kai-Ming Yang, Chen-Hao Lin, Pu-Ju Lin, Cheng-Ta Ko, Chin-Sheng Wang, Guang-Hwa Ma, Tzyy-Jang Tseng
  • Patent number: 11690173
    Abstract: A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, and at least one second build-up circuit layer. The dielectric substrate includes a through cavity penetrating the dielectric substrate. The embedded block is fixed in the through cavity. The embedded block includes a first through hole and a second through hole. The electronic component is disposed in the through hole of the embedded block. The first build-up circuit layer is disposed on the top surface of the dielectric substrate and covers the embedded block. The second build-up circuit layer is disposed on the bottom surface of the dielectric substrate and covers the embedded block.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: June 27, 2023
    Assignee: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Chin-Sheng Wang, Ra-Min Tain
  • Publication number: 20230093870
    Abstract: A method for forming resistance on circuit board is provided and includes the following steps. First, a substrate is provided. Next, a second metal layer is provided on the substrate, and the first metal layer is covered by the second metal layer. Then, a resistance is formed on the second metal layer, and the resistance is directly above the first metal layer. Thereafter, the second metal layer is cut so that the edge of the second metal layer is aligned with that of the first metal layer. The second metal layer is separated from the first metal layer. Next, the second metal layer is pressed with a circuit board, and the resistance is attached to a dielectric layer of the circuit board. Then, the second metal layer is etched to form a circuit pattern on the resistance.
    Type: Application
    Filed: November 17, 2021
    Publication date: March 30, 2023
    Inventors: Chin-Sheng Wang, Kai-Ming Yang, Chen-Hao Lin
  • Publication number: 20230046699
    Abstract: A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, at least one second build-up circuit layer, at least one conductive through hole, and a fine redistribution layer (RDL). The embedded block is fixed in a through cavity of the dielectric substrate. The electronic component is disposed in an opening of the embedded block. The first build-up circuit layer is disposed on a top surface of the dielectric substrate and electrically connected with the electronic component. The second build-up circuit layer is disposed on a bottom surface of the dielectric substrate and covers the embedded block. The conductive through hole is disposed in a via of the embedded block and electrically connects the first and the second build-up circuit layers. The fine RDL is disposed on and electrically connected to the first build-up circuit layer.
    Type: Application
    Filed: November 2, 2022
    Publication date: February 16, 2023
    Applicant: Unimicron Technology Corp.
    Inventors: Guang-Hwa Ma, Chin-Sheng Wang, Ra-Min Tain
  • Publication number: 20220408554
    Abstract: A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, and at least one second build-up circuit layer. The dielectric substrate includes a through cavity penetrating the dielectric substrate. The embedded block is fixed in the through cavity. The embedded block includes a first through hole and a second through hole. The electronic component is disposed in the through hole of the embedded block. The first build-up circuit layer is disposed on the top surface of the dielectric substrate and covers the embedded block. The second build-up circuit layer is disposed on the bottom surface of the dielectric substrate and covers the embedded block.
    Type: Application
    Filed: February 18, 2022
    Publication date: December 22, 2022
    Applicant: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Chin-Sheng Wang, Ra-Min Tain
  • Publication number: 20220377874
    Abstract: A method of manufacturing a circuit board is provided. The method includes forming an open substrate, in which the open substrate includes a substrate body having a top surface and a bottom surface; an opening in the substrate body, in which the opening has a first sidewall and a second sidewall opposite to the first sidewall; and at least one first fixing portion and at least one second fixing portion extending from the substrate body toward the opening, in which the first fixing portion and the second fixing portion are respectively protruded from the first sidewall and the second sidewall. A heat dissipation block is inserted in the opening to clamp the heat dissipation block between the first fixing portion and the second fixing portion, in which the heat dissipation block includes the heat dissipation block comprises a ceramic or a composite material.
    Type: Application
    Filed: August 8, 2022
    Publication date: November 24, 2022
    Inventors: Chin-Sheng WANG, Pei-Chang HUANG
  • Patent number: 11445596
    Abstract: A circuit board includes an open substrate and a heat dissipation block. The open substrate includes a substrate body, an opening and at least one first fixing portion and at least one second fixing portion. The substrate body has a top surface and a bottom surface. The opening is in the substrate body and has a first sidewall and a second sidewall opposite to the first sidewall. The first fixing portion and the second fixing portion extends from the substrate body toward the opening, in which the first fixing portion and the second fixing portion are respectively protruded from the first sidewall and the second sidewall. The heat dissipation block is directly clamped between the first fixing portion and the second fixing portion.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: September 13, 2022
    Assignee: Unimicron Technology Corp.
    Inventors: Chin-Sheng Wang, Pei-Chang Huang
  • Publication number: 20220238471
    Abstract: A manufacturing method of a metal bump structure is provided. A driving base is provided. At least one pad and an insulating layer are formed on the driving base. The pad is formed on an arrangement surface of the driving base and has an upper surface. The insulating layer covers the arrangement surface of the driving base and the pad, and exposes a part of the upper surface of the pad. A patterned metal layer is formed on the upper surface of the pad exposed by the insulating layer, and extends to cover a part of the insulating layer. An electro-less plating process is performed to form at least one metal bump on the patterned metal layer. A first extension direction of the metal bump is perpendicular to a second extension direction of the driving base.
    Type: Application
    Filed: March 15, 2021
    Publication date: July 28, 2022
    Applicant: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Ming-Ru Chen, Cheng-Chung Lo, Chin-Sheng Wang, Wen-Sen Tang
  • Patent number: 11373927
    Abstract: A package substrate includes a multilayer circuit structure, a gas-permeable structure, a heat conducting component, a first circuit layer, a second circuit layer and a build-up circuit structure. The gas-permeable structure and the heat conducting component are respectively disposed in a first and a second through holes of the multilayer circuit structure. The first and the second circuit layers are respectively disposed on an upper and a lower surfaces of the multilayer circuit structure and expose a first and a second sides of the gas-permeable structure. The build-up circuit structure is disposed on the first circuit layer and includes at least one patterned photo-imageable dielectric layer and at least one patterned circuit layer alternately stacked. The patterned circuit layer is electrically connected to the first circuit layer by at least one opening. The build-up circuit structure and the first circuit layer exposed by a receiving opening form a recess.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: June 28, 2022
    Assignee: Unimicron Technology Corp.
    Inventors: Chin-Sheng Wang, Ra-Min Tain, Pei-Chang Huang
  • Publication number: 20210144841
    Abstract: A circuit board includes an open substrate and a heat dissipation block. The open substrate includes a substrate body, an opening and at least one first fixing portion and at least one second fixing portion. The substrate body has a top surface and a bottom surface. The opening is in the substrate body and has a first sidewall and a second sidewall opposite to the first sidewall. The first fixing portion and the second fixing portion extends from the substrate body toward the opening, in which the first fixing portion and the second fixing portion are respectively protruded from the first sidewall and the second sidewall. The heat dissipation block is directly clamped between the first fixing portion and the second fixing portion.
    Type: Application
    Filed: January 20, 2021
    Publication date: May 13, 2021
    Inventors: Chin-Sheng WANG, Pei-Chang HUANG
  • Patent number: 10714448
    Abstract: A chip module includes a body, a bump, and a first bonding layer. The bump is disposed on the body. The first bonding layer is disposed on the bump. The first bonding layers and the bump are made of the same conductive material and the first bonding layer is porous.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: July 14, 2020
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Chin-Sheng Wang, Ra-Min Tain
  • Publication number: 20200214120
    Abstract: A method of manufacturing a circuit board having a heat dissipation block includes forming an opening through a substrate to form an open substrate. The opening has a first sidewall and a second sidewall opposite to each other, and the open substrate includes a substrate body surrounding the opening, at least one first fixing portion extending from the substrate body toward the opening and protruding from the first sidewall, and at least one second fixing portion extending from the substrate body toward the opening and protruding from the second sidewall. The heat dissipation block is then clamped between the first fixing portion and second fixing portion to fix the heat dissipation block in the opening.
    Type: Application
    Filed: February 25, 2019
    Publication date: July 2, 2020
    Inventors: Chin-Sheng WANG, Pei-Chang HUANG