Abstract: The invention provides a circuit board structure and a manufacturing method thereof. The circuit board structure includes a line portion, a first insulating layer, and a conductive terminal. The first insulating layer is disposed on the line portion. The conductive terminal is disposed on the first insulating layer and embedded in the first insulating layer to be electrically connected with the line portion. The conductive terminal includes a first portion, a second portion, and a third portion. The first portion protrudes from a surface of the first insulating layer. The second portion is embedded in the first insulating layer and connected to the first portion. The third portion is disposed between the line portion and the second portion. A width of the second portion is greater than a width of the third portion.

Abstract: The present disclosure discloses a set of novel epigenetic biomarkers for early detection, prediction of treatment response and prognosis of colorectal cancer. Aberrant methylation of the epigenetic biomarkers can be detected in tumor tissues and plasma samples from colorectal cancer patients but not in normal individuals. The present disclosure also discloses primers and probes used herein.

Abstract: A switching converter having pulse skipping mode includes a power stage circuit, a feedback control circuit, an operating signal generator circuit and a pulse skipping circuit. The feedback control circuit generates an initial pulse width modulation (PWM) signal according the output power. The operating signal generator circuit masks a part of pulses of a clock signal according to a pulse width of a pulse skipping signal, so as to generate an adjusted PWM signal. The pulse skipping circuit adaptively generates a duty ratio signal according to an input voltage and an output voltage, so as to generate the pulse skipping reference signal related to a duty ratio of the initial PWM signal. The pulse skipping circuit compares an amplification signal with the pulse skipping reference signal to generate the pulse skipping signal. The power stage circuit converts the input power to the output power according to the adjusted PWM signal.

Abstract: An anti-diffusion substrate structure includes a substrate, a substrate circuit layer, and a chip. The substrate has multiple through holes. Within each of the through holes includes a first metal layer and an anti-diffusion layer plated on the first metal layer. The anti-diffusion layer is an Electroless Palladium Immersion Gold (EPIG) layer or an Electroless Nickel Electroless Palladium Immersion Gold (ENEPIG) layer. The substrate circuit layer is mounted on the substrate and extended on the anti-diffusion layer within each of the through holes. The substrate circuit layer is made of a second metal layer, and a composition of the second metal layer is different from a composition of the first metal layer. The chip is electrically connected to the substrate circuit layer. The anti-diffusion layer is able to better prevent material of the first metal layer from migrating or diffusing to the second metal layer.

Abstract: A vapor chamber structure includes a first flexible substrate, a second flexible substrate, a spacer, a flexible sealing member, and a working fluid. The first flexible substrate includes a first organic material layer, a first copper foil layer, and a first capillary structure layer. The second flexible substrate includes a second organic material layer, a second copper foil layer, and a second capillary structure layer. The first copper foil layer, the first capillary structure layer, the spacer, the second copper foil layer, and the second capillary structure layer are retracted by a distance relative to the first and second organic material layers to form a space. The first and second organic material layers and the flexible sealing member define a sealed chamber. The working fluid is disposed in the sealed chamber and located among the first and second capillary structure layers and grooves of the spacer.

Abstract: A circuit board structure includes a circuit substrate having opposing first and second sides, a redistribution structure disposed at the first side, and a dielectric structure disposed at the second side. The circuit substrate includes a first circuit layer disposed at the first side and a second circuit layer disposed at the second side. The redistribution structure is electrically coupled to the circuit substrate and includes a first leveling dielectric layer covering the first circuit layer, a first thin-film dielectric layer disposed on the first leveling dielectric layer and having a material different from the first leveling dielectric layer, and a first redistributive layer disposed on the first thin-film dielectric layer and penetrating through the first thin-film dielectric layer and the first leveling dielectric layer to be in contact with the first circuit layer. The dielectric structure includes a second leveling dielectric layer disposed below the second circuit layer.

Abstract: A multi-layered resonator circuit structure and a multi-layered filter circuit structure. The multi-layered resonator circuit structure includes a multi-layered substrate, a plurality of resonators and a plurality of conductive components. The multi-layered substrate has a top surface, a bottom surface, and a ground layer. The top surface and the bottom surface face away from each other. The ground layer is located between the top surface and the bottom surface. A part of the plurality of resonators is/are disposed on the top surface. Another part of the plurality of resonators is/are disposed on the bottom surface. The plurality of conductive components is located in the multi-layered substrate. The plurality of resonators is electrically connected to the ground layer, respectively, via the plurality of conductive components.

Abstract: A detection system and an operating method are provided. The detection system is used to estimate a degradation state of a battery device. The detection system includes a first operation circuit, a second operation circuit, and a processor. The first operation circuit receives voltage timing data of the battery device, and calculates a first reference value of the battery device according to the voltage timing data. The second operation circuit receives temperature timing data of the battery device, and calculates a second reference value of the battery device according to the temperature timing data. The processor provides state data related to the degradation state according to the first reference value and the second reference value.

Abstract: An electronic packaging structure including a first circuit structure, a second circuit structure and at least one electronic device is provided. The first circuit structure includes a bottom conductive plate having at least one cavity. The first circuit structure is disposed on the second circuit structure. The first circuit structure and the second circuit structure are electrically connected to each other. The electronic device is disposed on the second circuit structure. The electronic device is disposed corresponding to the cavity of the first circuit structure.

Abstract: The present invention provides an etching device which comprises an oxygen supplier, so that the etching device of the present invention can etch copper gently by means of the dissolved oxygen in the etching solution to accurately control the etching degree so as to fulfill the stricter requirements of microcircuit manufacturing. The present invention further provides an etching method. Finally, the etching waste solution of the present invention can be recycled to further ameliorate the environmental pollution and reduce the production cost, so the present invention is widely applicable in integrated circuit packaging.

Abstract: An electronic packaging structure including a first circuit structure, a second circuit structure and at least one electronic device is provided. The bottom side of the first circuit structure has at least one cavity. The first circuit structure is disposed on the second circuit structure. The first circuit structure and the second circuit structure are electrically connected to each other. The electronic device is disposed on the second circuit structure. The electronic device is disposed corresponding to the cavity of the first circuit structure.

Abstract: An electronic package structure and its manufacturing method are provided. The electronic package structure includes an interposer, a circuit board, a chip, and a circuit structure. The interposer includes an interposer substrate and a coaxial conductive element located in the interposer substrate. The interposer substrate includes a cavity. The coaxial conductive element includes a first conductive structure, a second conductive structure surrounding the first conductive structure, and a first insulation structure. The first insulation structure is disposed between the first and second conductive structures. The circuit board is disposed on a lower surface of the interposer substrate and electrically connected to the coaxial conductive element. The chip is disposed in the cavity and located on the circuit board, so as to be electrically connected to the circuit board.

Abstract: An electronic package structure and manufacturing method thereof. The electronic package structure includes a circuit board, an interposer, a chip, a circuit structure, and a coaxial conductive element. The interposer is disposed on the circuit board. The interposer has a through groove. The chip is disposed in the through groove and located on the circuit board to electrically connect with the circuit board. The circuit structure is disposed on the interposer. The coaxial conductive element penetrates the interposer to electrically connect the circuit structure and the circuit board. The coaxial conductive element includes a first conductive structure, a second conductive structure, and a first insulating structure. The second conductive structure surrounds the first conductive structure. The first insulating structure is disposed between the first conductive structure and the second conductive structure.

Abstract: A manufacturing method of a metal bump structure is provided. A driving base is provided. At least one pad and an insulating layer are formed on the driving base. The pad is formed on an arrangement surface of the driving base and has an upper surface. The insulating layer covers the arrangement surface of the driving base and the pad, and exposes a part of the upper surface of the pad. A patterned metal layer is formed on the upper surface of the pad exposed by the insulating layer, and extends to cover a part of the insulating layer. An electro-less plating process is performed to form at least one metal bump on the patterned metal layer. A first extension direction of the metal bump is perpendicular to a second extension direction of the driving base.

Abstract: A circuit board structure includes a circuit substrate having opposing first and second sides, a redistribution structure disposed at the first side, and a dielectric structure disposed at the second side. The circuit substrate includes a first circuit layer disposed at the first side and a second circuit layer disposed at the second side. The redistribution structure is electrically coupled to the circuit substrate and includes a first leveling dielectric layer covering the first circuit layer, a first thin-film dielectric layer disposed on the first leveling dielectric layer and having a material different from the first leveling dielectric layer, and a first redistributive layer disposed on the first thin-film dielectric layer and penetrating through the first thin-film dielectric layer and the first leveling dielectric layer to be in contact with the first circuit layer. The dielectric structure includes a second leveling dielectric layer disposed below the second circuit layer.

Abstract: A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, and at least one second build-up circuit layer. The dielectric substrate includes a through cavity penetrating the dielectric substrate. The embedded block is fixed in the through cavity. The embedded block includes a first through hole and a second through hole. The electronic component is disposed in the through hole of the embedded block. The first build-up circuit layer is disposed on the top surface of the dielectric substrate and covers the embedded block. The second build-up circuit layer is disposed on the bottom surface of the dielectric substrate and covers the embedded block.

Abstract: A method for forming resistance on circuit board is provided and includes the following steps. First, a substrate is provided. Next, a second metal layer is provided on the substrate, and the first metal layer is covered by the second metal layer. Then, a resistance is formed on the second metal layer, and the resistance is directly above the first metal layer. Thereafter, the second metal layer is cut so that the edge of the second metal layer is aligned with that of the first metal layer. The second metal layer is separated from the first metal layer. Next, the second metal layer is pressed with a circuit board, and the resistance is attached to a dielectric layer of the circuit board. Then, the second metal layer is etched to form a circuit pattern on the resistance.

Abstract: A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, at least one second build-up circuit layer, at least one conductive through hole, and a fine redistribution layer (RDL). The embedded block is fixed in a through cavity of the dielectric substrate. The electronic component is disposed in an opening of the embedded block. The first build-up circuit layer is disposed on a top surface of the dielectric substrate and electrically connected with the electronic component. The second build-up circuit layer is disposed on a bottom surface of the dielectric substrate and covers the embedded block. The conductive through hole is disposed in a via of the embedded block and electrically connects the first and the second build-up circuit layers. The fine RDL is disposed on and electrically connected to the first build-up circuit layer.

Abstract: A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, and at least one second build-up circuit layer. The dielectric substrate includes a through cavity penetrating the dielectric substrate. The embedded block is fixed in the through cavity. The embedded block includes a first through hole and a second through hole. The electronic component is disposed in the through hole of the embedded block. The first build-up circuit layer is disposed on the top surface of the dielectric substrate and covers the embedded block. The second build-up circuit layer is disposed on the bottom surface of the dielectric substrate and covers the embedded block.

Abstract: A method of manufacturing a circuit board is provided. The method includes forming an open substrate, in which the open substrate includes a substrate body having a top surface and a bottom surface; an opening in the substrate body, in which the opening has a first sidewall and a second sidewall opposite to the first sidewall; and at least one first fixing portion and at least one second fixing portion extending from the substrate body toward the opening, in which the first fixing portion and the second fixing portion are respectively protruded from the first sidewall and the second sidewall. A heat dissipation block is inserted in the opening to clamp the heat dissipation block between the first fixing portion and the second fixing portion, in which the heat dissipation block includes the heat dissipation block comprises a ceramic or a composite material.