Abstract: A method for determining a plant growth curve includes obtaining color images and depth images of a plant to be detected at different time points, performing alignment processing on each color image and each depth image to obtain an alignment image, detecting the color image through a pre-trained target detection model to obtain a target bounding box, calculating an area ratio of the target bounding box in the color image, determining a depth value of all pixel points in the target boundary frame according to the aligned image, performing denoising processing on each depth value to obtain a target depth value, generating a first growth curve of the plant to be detected according to the target depth values and corresponding time points, and generating a second growth curve of the plant to be detected according to the area ratios and the corresponding time points.

Abstract: A method for determining a height of a plant, an electronic device, and a storage medium are disclosed. In the method, a target image is obtained by mapping an obtained color image with an obtained depth image. The electronic device processes the color image by using a pre-trained mobilenet-ssd network, obtains a detection box appearance of the plant, and extracts target contours of the plant to be detected from the detection box. The electronic device determines a depth value of each of pixel points in the target contour according to the target image. Target depth values are obtained by performing a de-noising on depth values of the pixel points, and a height of the plant to be detected is determined according to the target depth value. The method improves accuracy of height determination of a plant.

Abstract: A method for preparing a semiconductor device structure includes forming a first fin structure and a second fin structure over a semiconductor substrate, forming an isolation structure over the semiconductor substrate, partially removing the first fin structure and the second fin structure to form a recessed portion of the first fin structure and a recessed portion of the second fin structure, epitaxially growing a first source/drain (S/D) structure over the recessed portion of the first fin structure and a second S/D structure over the recessed portion of the second fin structure, partially removing the isolation structure through the first opening to form a second opening, and forming a contact etch stop layer (CESL) over the first S/D structure and the second S/D structure such that an air gap is formed and sealed in the first opening and the second opening.

Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes providing a substrate; forming a conductive layer on the substrate; patterning the conductive layer to form a first metallization layer and a second metallization layer extending along a first direction, wherein the first metallization layer has a first protruding portion protruding toward the second metallization layer; and forming a first channel layer within the first metallization layer and a second channel layer within the second metallization layer.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, a dielectric layer, a first metallization layer, a first channel layer, a second metallization layer, and a second channel layer. The dielectric layer is disposed on the substrate. The first metallization layer is disposed within the dielectric layer and extends along a first direction. The first channel layer is surrounded by the first metallization layer. The second metallization layer is disposed within the dielectric layer and extends along the first direction. The second channel layer is surrounded by the second metallization layer. The first metallization layer includes a first protruding portion protruding toward the second metallization layer.

Abstract: The present disclosure provides a semiconductor device structure with conductive plugs of different aspect ratios and manganese-containing lining layer and a method for preparing the same. The semiconductor device structure includes a substrate having a pattern-dense region and a pattern-loose region; a first conductive layer disposed over the substrate; a first dielectric layer disposed over the first conductive layer; a first conductive plug and a second conductive plug disposed in the first dielectric layer; wherein the first conductive plug and the second conductive plug comprises copper (Cu) and are separated from the first dielectric layer by the a first lining layer comprising manganese (Mn); wherein the first conductive plug and the second conductive plug have different aspect ratios.

Abstract: The present disclosure provides a method for fabricating a semiconductor device including providing a first semiconductor die, forming a connection dielectric layer above the first semiconductor die, forming a first bottom protection layer in the connection dielectric layer, forming a first conductive plate on the first bottom protection layer, and forming a first top protection layer on the first conductive plate. The first bottom protection layer and the first top protection layer are formed of manganese-zinc ferrite, nickel-zinc ferrite, cobalt ferrite, strontium ferrite, barium ferrite, lithium ferrite, lithium-zinc ferrite, single crystal yttrium iron garnet, or gallium substituted single crystal yttrium iron garnet.

Abstract: The present disclosure provides a semiconductor structure having an air gap dielectric and a method for preparing the semiconductor structure. The semiconductor structure includes a substrate; a plurality of conductive pillars disposed over the substrate; a plurality of dielectric pillars, disposed over the substrate, separated from the conductive pillars; a plurality of dielectric caps disposed over the conductive pillars, separated from the dielectric pillars; and a sealing layer disposed over the dielectric pillars and the dielectric caps.

Abstract: The present application discloses a semiconductor device with an electromagnetic interference protection structure and a method for fabricating the semiconductor device. The semiconductor device includes a connection structure having a connection dielectric layer, a first conductive plate positioned in the connection dielectric layer and electrically coupled to a supply voltage, a first bottom protection layer positioned below the first conductive plate, and a first top protection layer positioned on the first conductive plate, and a connection conductive layer positioned in the connection dielectric layer. The first bottom protection layer and the first top protection layer are formed of manganese-zinc ferrite, nickel-zinc ferrite, cobalt ferrite, strontium ferrite, barium ferrite, lithium ferrite, lithium-zinc ferrite, single crystal yttrium iron garnet, or gallium substituted single crystal yttrium iron garnet.

Abstract: The present disclosure provides a method for preparing a semiconductor device structure. The method includes preparing a substrate having a pattern-dense region and a pattern-loose region; forming a first conductive layer disposed over the substrate; forming a first dielectric layer disposed over the first conductive layer; etching the first dielectric layer to form a first opening and a second opening exposing the first conductive layer; forming a first lining layer and a first conductive plug in the first opening and a second conductive plug in the second opening, wherein the first lining layer comprises manganese (Mn), the first conductive plug comprises copper (Cu), and the first conductive plug and the second plug are surrounded by the first lining layer; and forming a second conductive layer over the first dielectric layer, the first lining layer and the first conductive layer, wherein the second conductive layer comprises copper (Cu).

Abstract: The present disclosure provides a semiconductor device structure with conductive plugs of different aspect ratios and manganese-containing lining layer and a method for preparing the same. The semiconductor device structure includes a substrate having a pattern-dense region and a pattern-loose region; a first conductive layer disposed over the substrate; a first dielectric layer disposed over the first conductive layer; a first conductive plug and a second conductive plug disposed in the first dielectric layer; wherein the first conductive plug and the second conductive plus comprises copper (Cu) and are separated from the first dielectric layer by the a first lining layer comprising manganese (Mn); wherein the first conductive plug and the second conductive plug have different aspect ratios.

Abstract: The present disclosure provides a method for fabricating a semiconductor device including providing a first semiconductor die, forming a connection dielectric layer above the first semiconductor die, forming a first bottom protection layer in the connection dielectric layer, forming a first conductive plate on the first bottom protection layer, and forming a first top protection layer on the first conductive plate. The first bottom protection layer and the first top protection layer are formed of manganese-zinc ferrite, nickel-zinc ferrite, cobalt ferrite, strontium ferrite, barium ferrite, lithium ferrite, lithium-zinc ferrite, single crystal yttrium iron garnet, or gallium substituted single crystal yttrium iron garnet.

Abstract: A method for preparing a semiconductor device structure includes forming a first fin structure and a second fin structure over a semiconductor substrate, forming an isolation structure over the semiconductor substrate, partially removing the first fin structure and the second fin structure to form a recessed portion of the first fin structure and a recessed portion of the second fin structure, epitaxially growing a first source/drain (S/D) structure over the recessed portion of the first fin structure and a second S/D structure over the recessed portion of the second fin structure, partially removing the isolation structure through the first opening to form a second opening, and forming a contact etch stop layer (CESL) over the first S/D structure and the second S/D structure such that an air gap is formed and sealed in the first opening and the second opening.

Abstract: The present application discloses a semiconductor device structure and a method for preparing the semiconductor device structure. The semiconductor device structure includes a first fin structure and a second fin structure disposed over a semiconductor substrate, and a first word line disposed across the first fin structure and the second fin structure. The semiconductor device structure also includes a first source/drain (S/D) structure disposed over the first fin structure and adjacent to the first word line, and a second S/D structure disposed over the second fin structure and adjacent to the first word line. The first S/D structure and the second S/D structure have an air gap therebetween.

Abstract: The present application discloses a semiconductor device with an electromagnetic interference protection structure and a method for fabricating the semiconductor device. The semiconductor device includes a connection structure having a connection dielectric layer, a first conductive plate positioned in the connection dielectric layer and electrically coupled to a supply voltage, a first bottom protection layer positioned below the first conductive plate, and a first top protection layer positioned on the first conductive plate, and a connection conductive layer positioned in the connection dielectric layer. The first bottom protection layer and the first top protection layer are formed of manganese-zinc ferrite, nickel-zinc ferrite, cobalt ferrite, strontium ferrite, barium ferrite, lithium ferrite, lithium-zinc ferrite, single crystal yttrium iron garnet, or gallium substituted single crystal yttrium iron garnet.

Abstract: A method for manufacturing a semiconductor structure is provided. The method includes the following steps. A fin structure having a base and a plurality of fin portions extending away from the base is provided. A portion of the fin structure in a first region is removed to form a first trench in the base and a first bump formed in the first trench. A first oxide layer is formed in the first region. The first oxide layer is removed.

Abstract: The present disclosure provides a semiconductor structure having an air gap dielectric and a method for preparing the semiconductor structure. The semiconductor structure includes a substrate; a plurality of conductive pillars disposed over the substrate; a plurality of dielectric pillars, disposed over the substrate, separated from the conductive pillars; a plurality of dielectric caps disposed over the conductive pillars, separated from the dielectric pillars; and a sealing layer disposed over the dielectric pillars and the dielectric caps.

Abstract: The present application discloses a semiconductor device structure and a method for preparing the semiconductor device structure. The semiconductor device structure includes a first fin structure and a second fin structure disposed over a semiconductor substrate, and a first word line disposed across the first fin structure and the second fin structure. The semiconductor device structure also includes a first source/drain (S/D) structure disposed over the first fin structure and adjacent to the first word line, and a second S/D structure disposed over the second fin structure and adjacent to the first word line. The first S/D structure and the second S/D structure have an air gap therebetween.

Abstract: The present disclosure provides a semiconductor structure having an air gap dielectric and a method for preparing the semiconductor structure. The method includes forming a conductive pillar over a substrate; forming a dielectric cap over the conductive pillar; transforming a sidewall portion of the conductive pillar into a first dielectric portion; and removing the first dielectric portion such that a width of the dielectric cap is greater than a width of a remaining portion of the conductive pillar.

Abstract: The present disclosure provides a semiconductor structure having an air gap dielectric and a method for preparing the semiconductor structure. The method includes forming a conductive pillar over a substrate; forming a dielectric cap over the conductive pillar; transforming a sidewall portion of the conductive pillar into a first dielectric portion; and removing the first dielectric portion such that a width of the dielectric cap is greater than a width of a remaining portion of the conductive pillar.