Abstract: A method including forming a III-V compound layer on a substrate and implanting a main dopant in the III-V compound layer to form source and drain regions. The method further includes implanting a group V species into the source and drain regions. A semiconductor device including a substrate and a III-V compound layer over the substrate. The semiconductor device further includes source and drain regions in the III-V layer, wherein the source and drain regions comprises a first dopants and a second dopant, and the second dopant comprises a group V material.

Abstract: An active device array substrate includes a substrate, first and second active devices, a gate insulation layer and an insulation barrier layer. The first and second active devices respectively includes first and second gate electrodes, first and second semiconductor blocks, first and second source electrodes, and first and second drain electrodes. A film layer of the second source electrode and the second drain electrode is the same with that of the first source electrode or the first drain electrode. The gate insulation layer is located between the first gate electrode and the first semiconductor block and between the second gate electrode and the second semiconductor block. The insulation barrier layer is disposed on the gate insulation layer, and covers the first semiconductor block. The insulation barrier layer has a first through hole for one of the first source electrode and the first drain electrode contacting the first semiconductor block.

Abstract: The disclosure provides a pixel circuit for driving a light emitting diode. A second terminal of a driving transistor is coupled to a first terminal of the light emitting diode, and a control terminal of the driving transistor receives a bias voltage. A coupling switch is coupled between a first terminal and the control terminal of the driving transistor and controlled by a first selection signal to be turned on or off. A first terminal of a first switch receives a display data voltage or a reference voltage, and the first switch is controlled by a second selection signal to be turned on or off. A first terminal of a second switch is coupled to a second terminal of the first switch. A second terminal of the second switch is coupled between the second terminal of the driving transistor and the light emitting diode, and the second switch is controlled by the first selection signal to be turned on or off.

Abstract: For an air conditioner, a quick release mechanism to expose a filter includes a body, a front panel, and a locking mechanism. The front panel is pivotally mounted on the body. The locking mechanism has a guide member, a slider, a compressible spring as a biasing member, and a push block. The slider is slidably disposed in the guide member. The slider has a hook portion. The biasing member provides a force to the slider. The push block is held in the guide member when the push block engages the hook portion, and the push block is ejected from the guide member by the biasing member when the push block disengages from the hook portion.

Abstract: An antenna assembly includes a side frame, a feed portion, a ground portion, a radiating portion, and a first matching circuit. The side frame defines a first gap to form a first radiating section from the first gap to a side portion. The radiating portion is inside the side frame and connects to the feed portion and the ground portion, the radiating portion is spaced apart from the side frame and connected to the first radiating section. One end of the first matching circuit connects to an end of the first radiating section adjacent to the first gap, another end connects to the ground portion. The feed portion feeds current into the radiating portion, two opposites ends of the first radiating section and the first matching circuit to activate radiating signals in a first frequency band. A wireless communication device employing the antenna assembly is also provided.

Abstract: A light emitting device, a manufacturing method thereof and a display device are disclosed. The light emitting device includes a light-emitting unit, a structured light guide layer, a light guide unit and a patterned reflective layer. The light-emitting unit has a circuit substrate and multiple light emitting elements, and the light emitting elements are separately disposed on a surface of the circuit substrate. The structured light guide layer is disposed opposite the light-emitting unit, and has multiple accommodating slots and multiple light guide structures disposed between the two accommodating slots. Each accommodating slot is disposed in correspondence with each light emitting element, and the light guide structures are disposed on the bottom surface of the structured light guide layer. The light guide unit is disposed on the top surface of the structured light guide layer.

Abstract: Systems and methods related to scheduling for a cluster of cells controlled by a base station of a cellular communications network are disclosed. In some embodiments, a method of operation of a base station in a cellular communications network to provide scheduling for a cluster of cells controlled by the base station is provided. In some embodiments, the method of operation of the base station comprises identifying a first set of Radio Access Bearers (RABs) for cluster scheduling for a Transmit Time Interval (TTI) and a second set of RABs for individual cell scheduling for the TTI, where the first set of RABs and the second set of RABs are non-overlapping sets. The method further includes performing cluster scheduling for the first set of RABs for the TTI and performing individual cell scheduling for the second set of RABs for the TTI.

Abstract: Semiconductor packages and methods of forming the same are disclosed. The semiconductor package includes a plurality of chips, a first molding compound, a first redistribution structure, a second molding compound and a second redistribution structure. The first molding compound encapsulates the chips. The first redistribution structure is disposed over the plurality of chips and the first molding compound. The second molding compound surrounds the first molding compound. The second redistribution structure is disposed over the first redistribution structure, the first molding compound and the second molding compound.

Abstract: The present invention discloses an electronic device charger, mainly comprising: a voltage converting module, a microprocessor, a low voltage detecting unit, and an over voltage sensing unit. When a rated output voltage of a vehicle battery of an electric vehicle is detected to be lower than a first threshold voltage by the low voltage detecting unit or found to be higher than a second threshold voltage by the over voltage sensing unit, the microprocessor immediately stops the vehicle battery providing electrical power to at least one portable electronic device owned by the driver of the electric vehicle. Therefore, the electronic device charger can not only save the energy of the vehicle battery while the vehicle battery is at a low voltage state, but also protect the portable electronic devices from being damaged by the electrical power as the rated output voltage of the vehicle battery exceed a normal voltage level.

Abstract: Method and device for providing safe zone information. The method includes receiving a map of an incident area sensor information from at least one sensor at the incident area. The method also includes determining a multi-dimensional model of the incident area based on the map of the incident area and the sensor information and determining a first threat location based on the sensor information, the map of the incident area, and the multi-dimensional model of the incident area. The method further includes determining a plurality of safe zone shadow areas based on the first threat location. The method also includes updating the multi-dimensional model of the incident area to include the plurality of safe zone shadow areas and to generate a safe zone shadow representation of the incident area and transmitting the safe zone shadow representation to at least one user device in the incident area.

Abstract: A device includes a substrate, and a vertical inductor over the substrate. The vertical inductor includes a plurality of parts formed of metal, wherein each of the parts extends in one of a plurality of planes perpendicular to a major surface of the substrate. Metal lines interconnect neighboring ones of the plurality of parts of the vertical inductor.

Abstract: Some embodiments relate to a semiconductor package. The semiconductor package includes a redistribution layer (RDL) including a first metal layer and a second metal layer. The second metal layer is stacked over the first metal layer and is coupled to the first metal layer through a via. A first semiconductor die is disposed over the RDL. The first semiconductor die includes a plurality of contact pads electrically coupled to the RDL, and the RDL enables fan-out connection of the first semiconductor die. A second semiconductor die is disposed over the first semiconductor die and over the RDL. The second semiconductor die is bonded to the RDL by a plurality of conductive bump structures.

Abstract: A keyboard device includes a circuit board and plural key structures. Each key structure includes a keycap, a hinge element and a base. The hinge element includes a first lateral wing part, a second lateral wing part and a bendable part. The first lateral wing part is connected between the keycap and the base. The second lateral wing part is connected between the keycap and the base. The bendable part is connected between the first lateral wing part and the second lateral wing part. The bendable part is thinner than the first lateral wing part and the second lateral wing part. While the keycap is moved upwardly or downwardly relative to the base, a bending angle of the hinge element and a relative position between the first base shaft and the first receiving hole are changed.

Abstract: A semiconductor device and a manufacturing method for the semiconductor device are provided. The semiconductor device includes a first dielectric layer, a bump, an etching stop layer and a spacer. The first dielectric layer is disposed over and exposes a conductive structure. The bump is partially disposed in the first dielectric layer to electrically connect the conductive structure. The etching stop layer is disposed over the first dielectric layer aside the bump a spacer and surrounds the bump and disposed between the etching stop layer and the bump.

Abstract: A semiconductor structure includes a semiconductor device, a first seal ring, a second seal ring, and a plurality of through semiconductor vias (TSV). The semiconductor device has a first surface and a second surface opposite to the first surface. The first seal ring is disposed on the first surface of the semiconductor device and is adjacent to edges of the first surface. The second seal ring is disposed on the second surface of the semiconductor device and is adjacent to edges of the second surface. The TSVs penetrate through the semiconductor device and physically connect the first seal ring and the second seal ring.

Abstract: Various embodiments are provided for facilitating the operation and control of a fleet of on-site energy assets and optimizing energy dispatch across the fleet, thereby facilitating the use of the on-site energy assets instead of grid-supplied electric consumption. An example system may comprise a central platform and a plurality of on-site gateway devices configured to perform on-site asset control. An example method may comprise receiving a service availability call, performing fleet-level optimization, generating a set of site-level schedules, and causing, as a function of the site-level schedules, real-time on-site asset control.

Abstract: Some embodiments relate to an integrated circuit device, which includes a bottom electrode, a dielectric layer, and top electrode. The dielectric layer is disposed over the bottom electrode. The top electrode is disposed over the dielectric layer, and an upper surface of the top electrode exhibits a recess. A via is disposed over the top electrode. The via makes electrical contact with only a tapered sidewall of the recess without contacting a bottom surface of the recess.

Abstract: A circuit structure includes an electronic component, a circuit board having a conductive path, the electronic component being mounted on the circuit board, a heat dissipation member on top of which the circuit board is placed and which dissipates heat of the circuit board, a sheet-like spacer sheet provided in a predetermined region between the circuit board and the heat dissipation member, and a bonding portion for bonding the circuit board and the heat dissipation member to each other, the bonding portion having adhesive properties or tackiness and being provided in a region between the circuit board and the heat dissipation member where the spacer sheet is not provided.

Abstract: A rotating sensing device includes a base, a rotating element, at least one magnetic element set, at least one magnetic sensing element set, and a processing unit. The magnetic element set is arranged on the rotating element and includes an axial magnetic element and a radial magnetic element. The magnetic sensing element set is arranged on the base and includes an axial magnetic sensing element and a radial magnetic sensing element. When the rotating element is rotated relatively to the base, a magnetic variation relative to the axial magnetic element and a magnetic variation relative to the radial magnetic element are respectively sensed by the axial magnetic sensing element and the radial magnetic sensing element, so as to generate a sensing signal. The processing unit is adapted to obtain a rotation speed, a loading value, and a deflection value. In addition, a rotating sensing method is also provided.

Abstract: A photo-sensitive layer is applied over a wafer. The photo-sensitive layer is exposed. In some embodiments, the photo-sensitive layer is exposed to EUV light. The photo-sensitive layer is baked. The photo-sensitive layer is developed. Humidity is introduced in at least one of: the applying, the baking, or the developing.