Patents by Inventor Chin-Yi Cho

Chin-Yi Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • BONDING LAYER STRUCTURE AND METHOD FOR WAFER TO WAFER BONDING
    Publication number: 20140042625
    Abstract: A structure comprises a first semiconductor substrate, a first bonding layer deposited on a bonding side the first semiconductor substrate, a second semiconductor substrate stacked on top of the first semiconductor substrate and a second bonding layer deposited on a bonding side of the second semiconductor substrate, wherein the first bonding layer is of a horizontal length greater than a horizontal length of the second semiconductor substrate, and wherein there is a gap between an edge of the second bonding layer and a corresponding edge of the second semiconductor substrate.
    Type: Application
    Filed: August 9, 2012
    Publication date: February 13, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Ting Huang, Jung-Huei Peng, Shang-Ying Tsai, Li-Min Hung, Yao-Te Huang, Yi-Chuan Teng, Chin-Yi Cho