Patents by Inventor Chin-Yi LIU

Chin-Yi LIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162010
    Abstract: A dielectric window for a process chamber is provided. The dielectric window includes a disc-shaped body consisting of a first dielectric material having a first dielectric constant. An annular portion consisting of a second dielectric material having a second dielectric constant greater than the first dielectric constant is seated in the disc-shaped body. The dielectric window has a substantially constant thickness over a process region of the process chamber. The process region is an interior region of the process chamber in which a plasma is generated during processing of a substrate in the process chamber. The seating of the annular portion in the disc-shaped body is configured to maintain the substantially constant thickness of the dielectric window.
    Type: Application
    Filed: March 15, 2022
    Publication date: May 16, 2024
    Inventors: Chin-Yi Liu, Dan Marohl
  • Patent number: 11974071
    Abstract: The present invention provides a control method of a processor, wherein the control method comprises the steps of: transmitting image data of a first frame to an integrated circuit, wherein the first frame corresponds to a first frame rate; determining a second frame rate of a second frame next to the first frame; determining if a difference between the second frame rate and the first frame rate belongs to a large scale frame rate adjustment or a small scale frame rate adjustment; if the difference between the second frame rate and the first frame rate belongs to the large scale frame rate adjustment, using a first mode to transmit image data of the second frame; and if the difference between the second frame rate and the first frame rate belongs to the small scale frame rate adjustment, using a second mode to transmit image data of the second frame.
    Type: Grant
    Filed: August 21, 2022
    Date of Patent: April 30, 2024
    Assignee: MEDIATEK INC.
    Inventors: Kang-Yi Fan, Chin-Wen Liang, Chang-Chu Liu, Sheng-Hsiang Chang, You-Min Yeh
  • Patent number: 11957064
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.
    Type: Grant
    Filed: October 18, 2022
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Patent number: 11942398
    Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Li Yang, Wen-Hsiung Lu, Jhao-Yi Wang, Fu Wei Liu, Chin-Yu Ku
  • Publication number: 20240081157
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.
    Type: Application
    Filed: November 6, 2023
    Publication date: March 7, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Publication number: 20240074328
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Patent number: 10923379
    Abstract: An insulator-type substrate is positioned on a support surface of a substrate support structure in exposure to a plasma. An initial clamping voltage is applied to an electrode within the substrate support structure to rapidly accumulate electrical charge on the support surface to hold the substrate. A backside cooling gas is flowed to a region between the substrate and the support surface, and a leak rate of the backside cooling gas is monitored. A steady clamping voltage is applied to the electrode, and the steady clamping voltage is adjusted in a step-wise manner to maintain the monitored leak rate of the backside cooling gas at just less than a maximum allowable leak rate. Or, a pulsed clamping voltage is applied to the electrode, and the pulsed clamping voltage is adjusted to maintain the monitored leak rate of the backside cooling gas at just less than the maximum allowable leak rate.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: February 16, 2021
    Assignee: Lam Research Corporation
    Inventors: Chin-Yi Liu, Daniel Lai, Rajitha Vemuri, Padma Gopalakrishnan
  • Patent number: 10109460
    Abstract: A system is disclosed for measuring an impedance of a plasma processing chamber. The system includes a radiofrequency signal generator configured to output a radiofrequency signal based on a frequency setpoint and provide an indication of an actual frequency of the radiofrequency signal, where the actual frequency can be different than the frequency setpoint. The system includes an impedance control module including at least one variable impedance control device. A difference between the actual frequency of the radiofrequency signal as output by the radiofrequency signal generator and the frequency setpoint is partially dependent upon a setting of the at least one variable impedance control device and is partially dependent upon the impedance of the plasma processing chamber. The system includes a connector configured to connect with a radiofrequency signal supply line of the plasma processing chamber. The impedance control module is connected between the radiofrequency signal generator and the connector.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: October 23, 2018
    Assignee: Lam Research Corporation
    Inventors: Chin-Yi Liu, David Schaefer, Dan Marohl
  • Publication number: 20180233393
    Abstract: An insulator-type substrate is positioned on a support surface of a substrate support structure in exposure to a plasma. An initial clamping voltage is applied to an electrode within the substrate support structure to rapidly accumulate electrical charge on the support surface to hold the substrate. A backside cooling gas is flowed to a region between the substrate and the support surface, and a leak rate of the backside cooling gas is monitored. A steady clamping voltage is applied to the electrode, and the steady clamping voltage is adjusted in a step-wise manner to maintain the monitored leak rate of the backside cooling gas at just less than a maximum allowable leak rate. Or, a pulsed clamping voltage is applied to the electrode, and the pulsed clamping voltage is adjusted to maintain the monitored leak rate of the backside cooling gas at just less than the maximum allowable leak rate.
    Type: Application
    Filed: February 15, 2017
    Publication date: August 16, 2018
    Inventors: Chin-Yi Liu, Daniel Lai, Rajitha Vemuri, Padma Gopalakrishnan
  • Publication number: 20180151331
    Abstract: A system is disclosed for measuring an impedance of a plasma processing chamber. The system includes a radiofrequency signal generator configured to output a radiofrequency signal based on a frequency setpoint and provide an indication of an actual frequency of the radiofrequency signal, where the actual frequency can be different than the frequency setpoint. The system includes an impedance control module including at least one variable impedance control device. A difference between the actual frequency of the radiofrequency signal as output by the radiofrequency signal generator and the frequency setpoint is partially dependent upon a setting of the at least one variable impedance control device and is partially dependent upon the impedance of the plasma processing chamber. The system includes a connector configured to connect with a radiofrequency signal supply line of the plasma processing chamber. The impedance control module is connected between the radiofrequency signal generator and the connector.
    Type: Application
    Filed: November 30, 2016
    Publication date: May 31, 2018
    Inventors: Chin-Yi Liu, David Schaefer, Dan Marohl
  • Patent number: 9790582
    Abstract: In accordance with this disclosure, there are provided several inventions, including a substrate processing apparatus with multi-layer surfaces configured to face the plasma and resist against corrosion. These multi-layer surfaces may in one example include a base layer of aluminum, anodized aluminum, or quartz, a second layer of stabilized zirconia, and a second layer of a yttrium-aluminum composite such as yttrium aluminum garnet (YAG).
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: October 17, 2017
    Assignee: Lam Research Corporation
    Inventors: Chin-Yi Liu, Russell Ormond, Nash W. Anderson, David M. Schaefer
  • Publication number: 20160312351
    Abstract: In accordance with this disclosure, there are provided several inventions, including a substrate processing apparatus with multi-layer surfaces configured to face the plasma and resist against corrosion. These multi-layer surfaces may in one example include a base layer of aluminum, anodized aluminum, or quartz, a second layer of stabilized zirconia, and a second layer of a yttrium-aluminum composite such as yttrium aluminum garnet (YAG).
    Type: Application
    Filed: April 27, 2015
    Publication date: October 27, 2016
    Inventors: Chin-Yi LIU, Russell ORMOND, Nash W. ANDERSON, David M. SCHAEFER