Abstract: An oscillating signal adjusting circuit is provided. The oscillating signal adjusting circuit is adapted to generate an internal clock signal of a touch and display driver integrated circuit and includes a frequency shift circuit and a spread spectrum control circuit. The frequency shift circuit acquires a first setting data indicated by a mode control signal, and determines whether to shift a frequency of the input clock signal according to the first setting data to generate a first output clock signal. The spread spectrum control circuit to acquires a second setting data indicated by the mode control signal, and determines whether to perform a spreading spectrum operation on the first output clock signal according to the second setting data to generate the internal clock signal. The mode control signal has a first voltage level in a display period and has a second voltage level in a touch sensing period.

Abstract: A brightness compensation method and a brightness compensation circuit for a display device are provided. The brightness compensation method includes the following steps. Receive original image data. Receive backlight timing parameters. Perform brightness compensation according to the image data and the backlight timing parameters. The step of performing brightness compensation includes adjusting at least one of pixel driving data, a driving gamma level, and a driver boost level.

Abstract: A brightness compensation method and a brightness compensation circuit for a display device are provided. The brightness compensation method includes the following steps. Receive original image data. Receive backlight timing parameters. Perform brightness compensation according to the image data and the backlight timing parameters. The step of performing brightness compensation includes adjusting at least one of pixel driving data, a driving gamma level, and a driver boost level.

Abstract: A display driver configured to drive a display panel is provided. The display panel displays an image frame in a first display mode or a second display mode. The display driver includes a first display driving channel and a second display driving channel. The first and the second display driving channels are configured to drive the display panel to display the image frame by using a sub-pixel rendering method. In the second display mode, the second display driving channel drives sub-pixels on the display panel to display corresponding grayscales by using a plurality of gamma voltages. A voltage value of at least one gamma voltage among the gamma voltages is determined according to an arrangement of the sub-pixels on the display panel. Furthermore, a display apparatus is also provided.

Abstract: A display driver configured to drive a display panel is provided. The display panel displays an image frame in a first display mode or a second display mode. The display driver includes a first display driving channel and a second display driving channel. The first and the second display driving channels are configured to drive the display panel to display the image frame by using a sub-pixel rendering method. In the second display mode, the second display driving channel drives sub-pixels on the display panel to display corresponding grayscales by using a plurality of gamma voltages. A voltage value of at least one gamma voltage among the gamma voltages is determined according to an arrangement of the sub-pixels on the display panel. Furthermore, a display apparatus is also provided.

Abstract: A voltage generator capable of preventing latch-up is disclosed. The voltage generator includes a positive charge pump unit, a negative charge pump unit, a second stage charge pump unit, and a control unit. The positive charge pump unit is utilized for generating a positive charge pump voltage according to a first enable signal. The negative charge pump is utilized for generating a negative charge pump voltage according to a second enable signal. The second stage charge pump unit is utilized for generating a gate-on voltage and a gate-off voltage according to a third enable signal and a fourth enable signal. The control unit is utilized for generating the first enable signal, the second enable signal, the third enable signal, and the fourth enable signal and make the second stage charge pump unit generate the gate-on voltage (or the gate-off voltage) in a successively-increasing (or decreasing) manner.

Abstract: A voltage generator capable of preventing latch-up is disclosed. The voltage generator includes a positive charge pump unit, a negative charge pump unit, a second stage charge pump unit, and a control unit. The positive charge pump unit is utilized for generating a positive charge pump voltage according to a first enable signal. The negative charge pump is utilized for generating a negative charge pump voltage according to a second enable signal. The second stage charge pump unit is utilized for generating a gate-on voltage and a gate-off voltage according to a third enable signal and a fourth enable signal. The control unit is utilized for generating the first enable signal, the second enable signal, the third enable signal, and the fourth enable signal and make the second stage charge pump unit generate the gate-on voltage (or the gate-off voltage) in a successively-increasing (or decreasing) manner.