Abstract: A chip packaging structure includes a flexible plate, a chip, and a plurality of leads. The chip is disposed on the flexible plate. A first boundary and a second boundary are defined on the flexible plate. The first boundary is located between the chip and the second boundary. A first area is formed between the first boundary and the chip. A second area is formed between the first boundary and the second boundary. The chip includes a plurality of signal conducting points and a plurality of non-signal conducting points. The plurality of leads are disposed on the flexible plate and include a plurality of signal leads and a plurality of non-signal leads. The width of the non-signal lead is smaller than the width of the signal lead extending out of the second boundary.

Abstract: A die structure and a die connecting method using the same are provided. The die structure includes a die and a bump structure. The bump structure includes a body and a solder layer. The body is disposed on the die. The solder layer is disposed on the body. The method includes providing a die structure mentioned above, providing a circuit board mentioned above, and soldering the solder layer of the die structure with the tine layer on the copper block of the circuit board. In different embodiments, a tin layer is omitted from the circuit board, wherein the solder layer of the die structure is directly soldered onto the surface of the copper block.

Abstract: A chip packaging structure includes a flexible plate, a chip, and a plurality of leads. The chip is disposed on the flexible plate. A first boundary and a second boundary are defined on the flexible plate. The first boundary is located between the chip and the second boundary. A first area is formed between the first boundary and the chip. A second area is formed between the first boundary and the second boundary. The chip includes a plurality of signal conducting points and a plurality of non-signal conducting points. The plurality of leads are disposed on the flexible plate and include a plurality of signal leads and a plurality of non-signal leads. The width of the non-signal lead is smaller than the width of the signal lead extending out of the second boundary.

Abstract: A semiconductor device, such as a semiconductor device of chip on film package, is provided. The semiconductor device includes at least an integrated circuit formed on a film base, each integrated circuit includes a chip and a plurality of leads formed interior to a boundary of a predetermined range, each lead is formed with a predetermined distance from the boundary. While the integrated circuit is punched from the film base along the boundary, conductive residue of leads left on the puncher is therefore reduced or avoided.

Abstract: The invention discloses a touch sensing device, which includes a containing space, a first substrate layer, a second substrate layer, a driver, and a sensor. The first substrate layer and the second substrate layer define the containing space for containing a fluid. The driver can provide charges to a first conducting layer of the first substrate layer, a second conducting layer of the second substrate layer, and the fluid. The sensor can sense the electric characteristics of the fluid. When a point unit approaches the touch sensing device and influences the charges, the appearance of the fluid could be changed and then the electric characteristics could also be changed.

Abstract: A die structure and a die connecting method using the same are provided. The die structure includes a die and a bump structure. The bump structure includes a body and a solder layer. The body is disposed on the die. The solder layer is disposed on the body. The method includes providing a die structure mentioned above, providing a circuit board mentioned above, and soldering the solder layer of the die structure with the tine layer on the copper block of the circuit board. In different embodiments, a tin layer is omitted from the circuit board, wherein the solder layer of the die structure is directly soldered onto the surface of the copper block.

Abstract: The present invention discloses a bathroom cabinet including two first extruded strips and two second extruded strips enclosed to form a frame. The two first extruded strips and the second extruded strip include opposite slots for embedding a back panel, and through holes are disposed on both ends of the two first extruded strips, and corresponding rails are protruded from surfaces of the two second extruded strips for passing fasteners through the through holes of the two first extruded strips and locking the fasteners into the rails of the two second extruded strips respectively, such that the extruded strips can be adjusted to a required size according to a user's need, and the invention can enhance the structural strength of the bathroom cabinet.

Abstract: The invention discloses an integrated circuit package. The integrated circuit package comprises a substrate having a first surface and a second surface opposite thereto and a first hole passing through the substrate from the first surface to the second surface. A plurality of conductive lines is disposed on a portion of the second surface of the substrate. A semiconductor chip is disposed above the second surface of the substrate, wherein a chamber is formed between the semiconductor chip and the substrate. A plurality of bonding pads are disposed on a side of the semiconductor chip which is toward the second surface of the substrate, wherein at least one of the bonding pads are electrically connected to one of the plurality of conductive lines. A first heat dissipation layer is disposed in the first hole, and extends into the chamber. A method for fabricating the integrated circuit package is also provided.

Abstract: The invention discloses an integrated circuit package. The integrated circuit package comprises a substrate having a first surface and a second surface opposite thereto and a first hole passing through the substrate from the first surface to the second surface. A plurality of conductive lines is disposed on a portion of the second surface of the substrate. A semiconductor chip is disposed above the second surface of the substrate, wherein a chamber is formed between the semiconductor chip and the substrate. A plurality of bonding pads are disposed on a side of the semiconductor chip which is toward the second surface of the substrate, wherein at least one of the bonding pads are electrically connected to one of the plurality of conductive lines. A first heat dissipation layer is disposed in the first hole, and extends into the chamber. A method for fabricating the integrated circuit package is also provided.

Abstract: An assembly structure is provided. The assembly structure includes a first substrate, a second substrate and a medium layer disposed between the first and second substrates. The medium layer includes a side edge, and the second substrate includes at least one lead wire. When the second substrate is disposed on the medium layer, the lead wire of the second substrate is relatively oblique to the side edge of the medium layer.

Abstract: The invention discloses an integrated circuit package. The integrated circuit package comprises a substrate having a first surface and a second surface opposite thereto and a first hole passing through the substrate from the first surface to the second surface. A plurality of conductive lines is disposed on a portion of the second surface of the substrate. A semiconductor chip is disposed above the second surface of the substrate, wherein a chamber is formed between the semiconductor chip and the substrate. A plurality of bonding pads are disposed on a side of the semiconductor chip which is toward the second surface of the substrate, wherein at least one of the bonding pads are electrically connected to one of the plurality of conductive lines. A first heat dissipation layer is disposed in the first hole, and extends into the chamber. A method for fabricating the integrated circuit package is also provided.

Abstract: The invention discloses a touch sensing device, which includes a containing space, a first substrate layer, a second substrate layer, a driver, and a sensor. The first substrate layer and the second substrate layer define the containing space for containing a fluid. The driver can provide charges to a first conducting layer of the first substrate layer, a second conducting layer of the second substrate layer, and the fluid. The sensor can sense the electric characteristics of the fluid. When a point unit approaches the touch sensing device and influences the charges, the appearance of the fluid could be changed and then the electric characteristics could also be changed.

Abstract: An assembly structure is provided. The assembly structure includes a first substrate, a second substrate and a medium layer disposed between the first and second substrates. The medium layer includes a side edge, and the second substrate includes at least one lead wire. When the second substrate is disposed on the medium layer, the lead wire of the second substrate is relatively oblique to the side edge of the medium layer.

Abstract: The invention discloses an integrated circuit package. The integrated circuit package comprises a substrate having a first surface and a second surface opposite thereto and a first hole passing through the substrate from the first surface to the second surface. A plurality of conductive lines is disposed on a portion of the second surface of the substrate. A semiconductor chip is disposed above the second surface of the substrate, wherein a chamber is formed between the semiconductor chip and the substrate. A plurality of bonding pads are disposed on a side of the semiconductor chip which is toward the second surface of the substrate, wherein at least one of the bonding pads are electrically connected to one of the plurality of conductive lines. A first heat dissipation layer is disposed in the first hole, and extends into the chamber. A method for fabricating the integrated circuit package is also provided.

Abstract: An asynchronous signed multiplier including N pieces of partial product generators (PPGs), an operation module and a leading-zero-bit-detector is provided. The partial product generator generates a plurality of partial product values in response to a multiplier and a multiplicand. The operation module conducts a sum-up operation on the outputs from the (N-1)-th PPG to the first PPG, and the output from the N-th PPG is added in the end. In addition, as the leading-zero-bit-detector detects any leading-zero-bit in the multiplier or the multiplicand, the partial product outputs corresponding to the bit of “0” is directly set to zero.

Abstract: An asynchronous multiplier is provided. The multiplier comprises a partial product generator, an addition array, a leading-zero-bit detector, a final-stage adder and a completion detector. The partial product generator generates a plurality of partial products, and the addition array adds these partial products. The leading-zero-bit detector detects effective bits of the multiplicand and the multiplier, and outputs a set of detection signals so that the adder of the addition array determines either to output zero or perform addition operation. Then, the final-stage adder adds these partial products and outputs a sum. Finally, the completion detector checks and outputs the result.