Abstract: A semiconductor device includes a trench disposed in a substrate and extending laterally along a first direction. A gate electrode is disposed in the trench. A first body region is disposed in the substrate and located in a first area. A second body region is located in the first area, disposed directly below and in direct contact with the first body region. The second body region has a doping concentration higher than that of the first body region. A source region is disposed within the first body region. A source contact penetrates the source region and extends downwards into the first body region. A drain region is disposed on a back side of the substrate.

Abstract: The present disclosure provides a method of enhancing an immune response in a subject in need thereof, including administering an effective amount of an antigen with an immune modulator to the subject, wherein the immune modulator is a quaternary immunomodulatory nanoparticle (QIN). The present disclosure also provides the use of the QIN in the manufacture of a chimeric nanoparticle, a pharmaceutical composition and a medicament for treating a subject suffering from a cancer or virus infection.

Abstract: A semiconductor device includes a substrate of first conductive type and an epitaxial layer; a first trench in the epitaxial layer; a first gate electrode structure in the first trench; a body region and the doped region of second conductivity type in the epitaxial layer, the body region is spaced apart from the first gate dielectric layer of the first gate electrode structure, the doped region is separated from the body region by the epitaxial layer and is contiguous with the first gate dielectric layer; a first electrode region of first conductivity type in the body region; a third gate structure on a top surface of the epitaxial layer, including a third gate and a third gate dielectric layer, the third gate structure partially overlaps the first gate dielectric layer and partially overlaps the body region; and a second electrode.

Abstract: A method of fabricating a semiconductor device includes providing a substrate and forming a well region thereon. First and second trenches are formed in the well region, and a dielectric layer is conformally deposited in these trenches. A conductive layer fills up these trenches and is etched to form a first recess on a first field plate and a second recess on a second field plate. The first and second recesses are filled up with a dielectric material to form first and second dielectric isolation portions. The dielectric layer and the first dielectric isolation portion are etched to form a first groove, and a first gate is formed therein. A source region and a drain region are formed in the well region and located on a side of the first trench and a side of the second trench, respectively.

Abstract: A semiconductor device includes a substrate having a first conductivity type, a well region having a second conductivity type and disposed on the substrate, a first trench and a second trench disposed in the well region. In addition, a first field plate and a first dielectric layer surrounding the first field plate are disposed in the first trench. A second field plate and a second dielectric layer surrounding the second field plate are disposed in the second trench. A first gate is disposed above the first field plate. A source electrode is disposed on a first side of the first trench, and a drain electrode is disposed on a second side of the second trench. The source electrode, the first trench, the second trench and the drain electrode are sequentially arranged along a first direction.

Abstract: A semiconductor device includes an epitaxial layer on a substrate, a body region and a trench gate structure in the epitaxial layer, and a planar gate on the epitaxial layer. The trench gate structure is extended along a first direction and adjacent to the body region. The planar gate is extended along a second direction. The second direction and the first direction have a non-zero included angle therebetween. A portion of the planar gate is located directly above the body region. A source region is disposed in the body region. In a top view, a portion of the epitaxial layer is laterally separated from the body region, the trench gate structure, and the planar gate. The portion of the epitaxial layer and the source region are located on two opposite sides of the planar gate, respectively.

Abstract: A semiconductor device includes an epitaxial layer on a substrate, a first body region and a first trench gate structure in the epitaxial layer, a first planar gate and a first source electrode on the epitaxial layer, a first source region in the first body region, and a drain electrode under the substrate. The first trench gate structure is extended along a first direction and adjacent to the first body region. The first planar gate is extended along a second direction and at least partially located directly above the first body region. There is a non-zero included angle between the second direction and the first direction. The first source electrode is extended downward into the first body region. The first source region is at least partially adjacent to the first source electrode.

Abstract: A semiconductor device comprises an epitaxial layer, a first trench, a first field plate, a first trench gate, a first planar gate, and a first conductive connection portion. The first trench is disposed in the epitaxial layer and extends along a first direction. The first field plate is disposed in the first trench and extends along the first direction. The first trench gate is disposed in the first trench and extends along the first direction, where the first trench gate is laterally separated from the first field plate. The first planar gate is disposed on the first field plate and the first trench gate. The first conductive connection portion is disposed in the first trench and located between the first trench gate and the first planar gate, and the first trench gate is electrically connected to the first planar gate through the first conductive connection portion.

Abstract: A semiconductor device includes a substrate of first conductive type and an epitaxial layer; a first trench in the epitaxial layer; a first gate electrode structure in the first trench; a body region and the doped region of second conductivity type in the epitaxial layer, the body region is spaced apart from the first gate dielectric layer of the first gate electrode structure, the doped region is separated from the body region by the epitaxial layer and is contiguous with the first gate dielectric layer; a first electrode region of first conductivity type in the body region; a third gate structure on a top surface of the epitaxial layer, including a third gate and a third gate dielectric layer, the third gate structure partially overlaps the first gate dielectric layer and partially overlaps the body region; and a second electrode.

Abstract: A semiconductor device includes a substrate with first conductivity type and an epitaxial layer; a first trench and a second trench in the epitaxial layer, the depth of the first trench being greater than that of the second trench; a first gate structure including a first gate in the first trench and a first gate dielectric layer; a second gate structure including a second gate in the second trench and a second gate dielectric layer between the second gate and the epitaxial layer; a body region with second conductivity type being spaced apart from the first gate dielectric layer and being contiguous with the second gate dielectric layer; a first electrode region having first conductivity type; a third gate structure on the epitaxial layer and partially overlapping with the body region; and a second electrode. The Avalanche Energy, Single Pulse (EAS) durability of the semiconductor device is improved.

Abstract: A power conversion circuit, a power conversion system, a power source and a method and a device of controlling the same are provided. The power conversion circuit includes an AC/DC rectifier circuit, a DC/DC conversion circuit and an energy storing circuit coupled between the AC/DC rectifier circuit and the DC/DC conversion circuit. The energy storing circuit includes a first capacitor, a second capacitor and a switch. The first capacitor and the second capacitor are coupled in series. The switch is coupled in parallel with the second capacitor. The switch is configured to turn on when the output voltage of the AC/DC rectifier circuit is smaller than or equal to a threshold value; and turn off when the output voltage of the AC/DC rectifier circuit is larger than the threshold value, wherein the threshold value is smaller than or equal to the rated voltage of the first capacitor.

Abstract: A semiconductor device includes a substrate having a first conductivity type, a well region having a second conductivity type and disposed on the substrate, a first trench and a second trench disposed in the well region. In addition, a first field plate and a first dielectric layer surrounding the first field plate are disposed in the first trench. A second field plate and a second dielectric layer surrounding the second field plate are disposed in the second trench. A first gate is disposed above the first field plate. A source electrode is disposed on a first side of the first trench, and a drain electrode is disposed on a second side of the second trench. The source electrode, the first trench, the second trench and the drain electrode are sequentially arranged along a first direction.

Abstract: A semiconductor device includes an epitaxial layer on a substrate, a first body region and a first trench gate structure in the epitaxial layer, a first planar gate and a first source electrode on the epitaxial layer, a first source region in the first body region, and a drain electrode under the substrate. The first trench gate structure is extended along a first direction and adjacent to the first body region. The first planar gate is extended along a second direction and at least partially located directly above the first body region. There is a non-zero included angle between the second direction and the first direction. The first source electrode is extended downward into the first body region. The first source region is at least partially adjacent to the first source electrode.

Abstract: A semiconductor device includes a substrate and a well region both having a first conductivity type, a trench in the substrate and directly above the well region, a first trench gate and a second trench gate disposed in the trench and laterally separated from each other, a dielectric isolation portion disposed in the trench and between the first and second trench gates, and a dielectric liner in the trench and under bottom surfaces of the first and second trench gates. A middle region of a bottom surface of the dielectric isolation portion protrudes downward and is lower than two side regions of the bottom surface of the dielectric isolation portion. Below a horizontal line of the bottom surfaces of the first and second trench gates, the thickness of the dielectric isolation portion is greater than the thickness of the dielectric liner.

Abstract: Provided is a power transistor device including a substrate, a first electrode, and a second electrode. The substrate has an active region and a terminal region. The terminal region surrounds the active region. The substrate includes a first trench and a second trench. The first trench is disposed within the active region and adjacent to the terminal region. The second trench is disposed within the terminal region and adjacent to the active region. The first electrode and the second electrode are respectively disposed in the first trench and the second trench. The first electrode and the second electrode both are electrically floating.

Abstract: A window blind includes top and bottom beams, and many slats disposed therebetween. The top beam has two opposite lateral holes. The window blind further includes a slat folding transmission device having a cord rolling member disposed in the top beam, and two opposite lift transmission cords passing through the lateral holes of the lateral plates of the top beam respectively. Two ends of each lift transmission cord are connected with the bottom beam and the cord rolling member respectively, so that the two lift transmission cords can pull the bottom beam simultaneously when being rolled by the cord rolling member, thereby moving the bottom beam upwardly to fold up the slats. Therefore, the slats of the window blind of the invention need no processing and keep complete in structure, thereby providing good effect of blocking out the light when being adjusted to the inclined condition.

Abstract: Provided is a power transistor device including a substrate, a first electrode, and a second electrode. The substrate has an active region and a terminal region. The terminal region surrounds the active region. The substrate includes a first trench and a second trench. The first trench is disposed within the active region and adjacent to the terminal region. The second trench is disposed within the terminal region and adjacent to the active region. The first electrode and the second electrode are respectively disposed in the first trench and the second trench. The first electrode and the second electrode both are electrically floating.

Abstract: A dual-use pole used in a non-cord window blind assembly is provided to have a pole shank and a pole head. The pole head has a flange and a driving block. The flange has an end surface located at an end of the pole shank. The driving block is located at an opposing end surface of the flange and it is used to connect and drive a blind slat tilt adjuster to further adjust the tilt angle of the blind slats.

Abstract: A power semiconductor device including a substrate having an active region and a terminal region is provided. The terminal region surrounds the active region. A first epitaxial layer is disposed on the substrate in the active region and the terminal region. A second epitaxial layer is disposed on the first epitaxial layer. The second epitaxial layer includes a first termination trench, a second termination trench, and a third termination trench. The first termination trench is disposed in the terminal region and is adjacent to the active region. The second termination trench is disposed in the terminal region. The third termination trench is disposed in the terminal region. The second termination trench is located between the first termination trench and the third termination trench. The third termination trench has a third electrode electrically connected to a drain.

Abstract: An environment-friendly material includes 50 wt % to 70 wt % of inorganic mineral powder, 20 wt % to 45 wt % of polyolefin, and 5 wt % to 15 wt % of auxiliary agent. The inorganic mineral powder contains calcium carbonate; the polyolefin may be linear low density polyethylene, low density polyethylene, medium density polyethylene, high density polyethylene, or polypropylene; and the auxiliary agent may be polyolefin elastomer, maleic anhydride grafted polyolefin elastomer, or maleic anhydride grafted polyethylene. The disclosure also provides a manufacturing method of window covering slat using the environment-friendly material and a window covering slat manufactured by the method.