Patents by Inventor Ching-An Chen

Ching-An Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250131094
    Abstract: A control device includes a first memory, a second memory, a processing circuit and an input-output interface. The first memory stores a secure-bootloader program code. The second memory stores a first specific program code. The processing circuit performs the secure-bootloader program code to execute a first legality verification on the first specific program code. When the first specific program code passes the first legality verification, the processing circuit performs the first specific program code to generate a verification signal. The input-output interface is configured to output the verification signal to an external device and receives a response signal from the external device. The processing circuit executes a second legality verification on the reply signal. When the reply signal does not pass the second legality check, the processing circuit ignores a request from the external device.
    Type: Application
    Filed: July 30, 2024
    Publication date: April 24, 2025
    Inventors: Ching-An CHEN, Tzu-Lan SHEN
  • Publication number: 20240070278
    Abstract: An Over-the-Air (OTA) method includes controlling the current state using a control state register. The method includes recording the current state and the hash algorithm. A sorting setter obtains a random number from a server. The method includes sorting the random numbers according to a preset sorting method to obtain a sorting parameter. A hash calculator uses the sorting parameter as the input of the hash algorithm. The hash algorithm outputs a device-side hash result and transmits the device-side hash result to the server through a transmission device. After the server receives the device-side hash result, it compares the device-side hash result with the server-side hash result calculated by the server.
    Type: Application
    Filed: July 5, 2023
    Publication date: February 29, 2024
    Inventors: Ching-An CHEN, Tzu-Lan SHEN
  • Patent number: 6451161
    Abstract: A method and a reactor of plasma treating a wafer with high induction plasma density and high uniformity of reactive species were disclosed in this invention. The inductively coupled plasma reactor of the present invention includes a vacuum chamber having a dielectric ceiling thereof and a unique coil configuration atop on the dielectric ceiling, wherein the dielectric ceiling is designed to have a different height according to its shape, e.g., a planar, dish-shaped or hat-shaped dielectric ceiling, for coupling an RF power into the chamber to excite the plasma. The unique coil configuration contains plural helical coils which are arranged in series or in parallel to provide a high-density uniform ion plasma for a large wafer treatment.
    Type: Grant
    Filed: April 10, 2000
    Date of Patent: September 17, 2002
    Assignee: Nano-Architect Research Corporation
    Inventors: David Guang-Kai Jeng, Hong-Ji Lee, Fred Yingyi Chen, Ching-An Chen, Tsung-Nane Kuo, Jui-Hung Yeh
  • Publication number: 20020121345
    Abstract: A multi-chamber system for processing semiconductor wafers with inductively coupled plasma comprises an inductive coil arrangement for plasma generation disposed on dielectric windows of a reaction chamber, in which the inductive coil arrangement includes a plurality of coil units in parallel to each other with a current flowing through in a direction opposite to that of adjacent coil units and a metal ring disposed above each of the coil units to meet a specific impedance. The inductive coil arrangement for plasma generation reduces the capacitive coupling between the inductive coil arrangement and the produced plasma, thereby decreasing the sheath voltage thereof and damages to the wafers during the process with the plasma. In the multi-chamber system, a plurality of working platforms are provided on a susceptor in the reaction chamber such that a plurality of small-size wafers can be simultaneously processed.
    Type: Application
    Filed: March 5, 2001
    Publication date: September 5, 2002
    Applicant: Nano-Architect Research Corporation
    Inventors: Ching-An Chen, Hong-Ji Lee, David Guang-Kai Jeng