Abstract: A power supply system includes a voltage conversion circuit and at least one voltage detector. The voltage conversion circuit converts AC voltage into DC voltage. The voltage detector includes a voltage dividing circuit, a phase voltage detection circuit, and a line voltage detection circuit. The voltage dividing circuit is coupled to the voltage conversion circuit to receive AC voltage. The voltage dividing circuit includes multiple impedance elements and multiple voltage dividing nodes to output multiple divided voltages. The phase voltage detection circuit is coupled to one of the voltage dividing nodes of voltage dividing circuit to generate a phase voltage detection signal based on one of the divided voltages. The line voltage detection circuit is coupled to a part of the voltage dividing nodes of voltage dividing circuit to generate a line voltage detection signal based on a part of the divided voltages.

Abstract: Semiconductor structures and methods for forming the same are provided. A semiconductor structure according to the present disclosure includes a substrate, a first base fin and a second base fin rising from the substrate, an isolation feature disposed over the substrate and between the first base fin and the second base fin, a first bottom epitaxial feature over the first base fin, a second bottom epitaxial feature over the second base fin, an isolation layer on the first bottom epitaxial feature, a first source/drain feature over the isolation layer, a second source/drain feature disposed over and in contact with the second bottom epitaxial feature, a contact etch stop layer (CESL) over the first source/drain feature and the isolation feature, a first interlayer dielectric (ILD) layer over the CESL, and a second ILD layer over and in direct contact with the second source/drain feature.

Abstract: In a method of pattern formation information including a pattern size on a reticle is received. A width of an EUV radiation beam is adjusted in accordance with the information. The EUV radiation beam is scanned on the reticle. A photo resist layer is exposed with a reflected EUV radiation beam from the reticle. An increase of intensity per unit area of the EUV radiation beam on the reticle after the adjusting the width is greater when the width before adjustment is W1 compared to an increase of intensity per unit area of the EUV radiation beam on the reticle after the adjusting the width when the width before adjustment is W2 when W1>W2.

Abstract: Disclosed are a light-driven filtration antibacterial composite membrane and a preparation method and use thereof. The method for preparing the light-driven filtration antibacterial composite membrane includes: mixing dichloromethane and N,N-dimethylformamide to obtain a first solution; adding PCL particles to the first solution, and stirring until being uniform to obtain an electrospinning solution; adding a ZIF-8 powder to the electrospinning solution, and ultrasonically dispersing for at least 1 hour to obtain a PCL/ZIF-8 spinning solution; spraying the PCL/ZIF-8 spinning solution onto a PPCL@PDA/TAEG men-blown membrane to obtain the light-driven filtration antibacterial composite membrane.

Abstract: A slide rail assembly including a first rail, a second rail, a third rail, a first supporting device, and at least one supporting member is provided. The first rail includes a first end portion and a second end portion that are opposite to each other. The second rail is longitudinally movable relative to the first rail. The third rail is longitudinally movable relative to the second rail. The first supporting device exceeds the first end portion of the first rail for a predetermined longitudinal distance. The at least one supporting member is arranged on one of the second rail and the first supporting device.

Abstract: A film thickness measurement device includes a spectroscopic ellipsometer, and the spectroscopic ellipsometer includes a projection module and a light receiving module. The projection module is configured to project a multi-wavelength polarized light onto a thin film. The projection module includes a light source and a polarization state generator. The light receiving module includes a polarization analyzer and an optical detector. The polarization analyzer is configured to screen out a multi-wavelength polarized reflection light according to reflection of the multi-wavelength polarized light by the thin film. The optical detector is configured to receive the multi-wavelength polarized reflection light. The optical detector includes at least one optical splitting unit, at least two optical filtering units and at least two optical detection units.

Abstract: Disclosed is a non-interlock assembled flooring system, comprising: a base sheet layer and a surface slat layer disposed on the base sheet layer, wherein the surface slat layer includes a plurality of wood floor slats arranged side-by-side in a widthwise direction, the wood floor slats are separated by a plurality of cut grooves serving as expansion joints, and the surface slat layer has a continuous wood-grain surface formed by upper surfaces of the wood floor slats.

Abstract: A memory circuit includes a control circuit configured to receive a clock signal including a clock cycle and output control signals based on the clock signal, an input circuit arrangement configured to, responsive to the control signals, pass a latched address to an output of the input circuit arrangement, the latched address including, during a first half of the clock cycle, a read address received at a first input port, and, during a second half of the clock cycle, a write address received at a second input port, an array of single-port memory cells, the memory circuit being configured to perform read and write operations during the respective first and second halves of the clock cycle, and a decoding circuit arrangement configured to, based on the latched address at the output, activate a row of memory cells of the array during each of the first and second clock cycle halves.

Abstract: A slide rail assembly includes a first rail, a second rail, a blocking feature, two operating members and a locking member. The second rail and the first rail are movable relative to each other. The blocking feature is arranged on the first rail. The two operating members and the locking member are movably mounted on the second rail. When the second rail is located at a predetermined position relative to the first rail and when the locking member is in a locking state, the locking member and the blocking feature are configured to block each other to prevent the second rail from being moved away from the predetermined position. When one of the two operating members is operated, the locking member is configured to be driven to move from the locking state to an unlocking state to allow the second rail to be moved away from the predetermined position.

Abstract: A slide rail kit is applicable to a rack. The slide rail kit includes a first rail and a locking member. The first rail is arranged with a mounting feature. The locking member is arranged on the first rail. The mounting feature is configured to mount the first rail to a mounting structure of the rack. The locking member includes a locking part and an operating part. The locking part is configured to be held in a state being blocked by the rack in response to an elastic force of an elastic structure. The operating part is configured to be operated to move the locking part away from the state being blocked by the rack.

Abstract: A breast pump includes a main body and a breast milk suctioning shield. The main body has an accommodation space. The breast milk suctioning shield is assembled in the accommodation space and detachably connected to the main body. A front end of the breast milk suctioning shield has a breast shielding portion, and a nipple passage extends from a rear end of a center portion of the breast shielding portion. One or more deformable members are assembled with an annular connection portion between the breast shielding portion and the nipple passage, and the deformable member is controlled to be inflated or deflated by a first air pump.

Abstract: A semiconductor device structure and a formation method are provided. The method includes forming a protruding structure over a substrate. The protruding structure has multiple sacrificial layers and multiple semiconductor layers, and the sacrificial layers and the semiconductor layers have an alternating configuration. The method also includes forming a gate stack to wrap a portion of the protruding structure. The method further includes forming an epitaxial structure abutting edges of the semiconductor layers. The formation of the epitaxial structure includes forming a lower semiconductor portion on a bottom of the recess and forming an upper semiconductor portion over the lower semiconductor portion. The upper semiconductor portion and the lower semiconductor portion are oppositely doped.

Abstract: A slide rail assembly includes a first rail, a second rail, a blocking feature, two operating members and a locking member. The blocking feature is arranged on the first rail. The two operating members and the locking member are movably mounted on the second rail. When the second rail is located at a predetermined position relative to the first rail, the locking member is blocked by the blocking feature to prevent the second rail from being moved away from the predetermined position. When one of the two operating members is operated, the locking member is configured to be driven to move to allow the second rail to be moved away from the predetermined position.

Abstract: Methods of cutting gate structures, and structures formed, are described. In an embodiment, a structure includes first and second gate structures over an active area, and a gate cut-fill structure. The first and second gate structures extend parallel. The active area includes a source/drain region disposed laterally between the first and second gate structures. The gate cut-fill structure has first and second primary portions and an intermediate portion. The first and second primary portions abut the first and second gate structures, respectively. The intermediate portion extends laterally between the first and second primary portions. First and second widths of the first and second primary portions along longitudinal midlines of the first and second gate structures, respectively, are each greater than a third width of the intermediate portion midway between the first and second gate structures and parallel to the longitudinal midline of the first gate structure.

Abstract: A light-emitting device includes: a semiconductor stack, including a first semiconductor layer, a second semiconductor layer and an active area between the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer includes an upper surface; a plurality of exposed regions, formed in the semiconductor stack and exposing the upper surface; a lower protective layer, covering the exposed regions and the second semiconductor layer; a first reflective structure, formed on the second semiconductor layer and including a plurality of first openings on the second semiconductor layer; a second reflective structure, formed on the first reflective structure and electrically connected to the second semiconductor layer through the plurality of first openings; and an upper protective layer, formed on the second reflective structure; wherein the upper protective layer contacts and overlaps the lower protective layer on the exposed regions; wherein the first reflective structure and the

Abstract: Integrated circuit devices and methods of forming the same are provided. A method according to the present disclosure includes providing a workpiece including a first metal feature in a dielectric layer and a capping layer over the first metal feature, selectively depositing a blocking layer over the capping layer, depositing an etch stop layer (ESL) over the workpiece, removing the blocking layer, and depositing a second metal feature over the workpiece such that the first metal feature is electrically coupled to the second metal feature. The blocking layer prevents the ESL from being deposited over the capping layer.

Abstract: A printing device and the ribbon mounting mechanism thereof are disclosed. The ribbon mounting mechanism is used for mounting a first ribbon comprising a first core and a second ribbon comprising a second core having a diameter smaller than that of the first core. The ribbon mounting mechanism includes a first shaft supporting the first core of the first ribbon; a second shaft supporting the second core of the second ribbon, wherein the second shaft and the first shaft are concentrically disposed; a torque generator comprising a third shaft; a first gear set connecting the first shaft and the third shaft, and torque generated by the torque generator is transmitted to the first shaft through the first gear set; and a second gear set connecting the second shaft and the third shaft, and torque generated by the torque generator is transmitted to the second shaft through the second gear set.

Abstract: The disclosure provides a method of manufacturing a semiconductor device including bonding a second device wafer to a first device wafer, such that a first bonding interface including a dielectric-to-dielectric bonding interface and a metal-to-metal bonding interface is formed between the first device wafer and the second device wafer, wherein the second device wafer is electrically coupled to the first device wafer, and a function of the first device wafer and the second device wafer are the same kind of device wafer. A semiconductor device is also provided.

Abstract: Provided are a composition and a method for preventing thrombogenesis. The composition includes a conjugate of heparin and a viral capsid protein, wherein the heparin is covalently bonded with the viral capsid protein.

Abstract: In a method of manufacturing a semiconductor device, a fin structure, in which first semiconductor layers and second semiconductor layers are alternately stacked, is formed. A sacrificial gate structure is formed over the fin structure. The first semiconductor layers, the second semiconductor layer and an upper portion of the fin structure at a source/drain region of the fin structure, which is not covered by the sacrificial gate structure, are etched. A dielectric layer is formed over the etched upper portion of the fin structure. A source/drain epitaxial layer is formed. The source/drain epitaxial layer is connected to ends of the second semiconductor wires, and a bottom of the source/drain epitaxial layer is separated from the fin structure by the dielectric layer.