Abstract: The present disclosure, in some embodiments, relates to a metal-insulator-metal (MIM) capacitor structure. The MIM capacitor structure includes one or more lower interconnects disposed within a lower dielectric structure over a substrate. A first dielectric layer is over the lower dielectric structure and includes sidewalls defining a plurality of openings extending through the first dielectric layer. A lower electrode is arranged along the sidewalls and over an upper surface of the first dielectric layer, a capacitor dielectric is arranged along sidewalls and an upper surface of the lower electrode, and an upper electrode is arranged along sidewalls and an upper surface of the capacitor dielectric. A spacer is along opposing outermost sidewalls of the upper electrode. The spacer has an outermost surface extending from a lowermost surface of the spacer to a top of the spacer. The outermost surface is substantially aligned with an outermost sidewall of the lower electrode.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a first and second gate electrode layers, and a dielectric feature disposed between the first and second gate electrode layers. The dielectric feature has a first surface. The structure further includes a first conductive layer disposed on the first gate electrode layer. The first conductive layer has a second surface. The structure further includes a second conductive layer disposed on the second gate electrode layer. The second conductive layer has a third surface, and the first, second, and third surfaces are coplanar. The structure further includes a third conductive layer disposed over the first conductive layer, a fourth conductive layer disposed over the second conductive layer, and a dielectric layer disposed on the first surface of the dielectric feature. The dielectric layer is disposed between the third conductive layer and the fourth conductive layer.

Abstract: The present disclosure, in some embodiments, relates to a method of forming a capacitor structure. The method includes forming a capacitor dielectric layer over a lower electrode layer, and forming an upper electrode layer over the capacitor dielectric layer. The upper electrode layer is etched to define an upper electrode and to expose a part of the capacitor dielectric layer. A spacer structure is formed over horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and also along sidewalls of the upper electrode. The spacer structure is etched to remove the spacer structure from over the horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and to define a spacer. The capacitor dielectric layer and the lower electrode layer are etched according to the spacer to define a capacitor dielectric and a lower electrode.

Abstract: The present disclosure relates to a semiconductor device and a manufacturing method, and more particularly to a semiconductor device with fin structures having different top surface crystal orientations and/or different materials. The present disclosure provides a semiconductor structure including n-type FinFET devices and p-type FinFET devices with different top surface crystal orientations and with fin structures having different materials. The present disclosure provides a method to fabricate a semiconductor structure including n-type FinFET devices and p-type FinFET devices with different top surface crystal orientations and different materials to achieve optimized electron transport and hole transport. The present disclosure also provides a diode structure and a bipolar junction transistor structure that includes SiGe in the fin structures.

Abstract: The present invention relates to compounds of Formula (I): or a pharmaceutically acceptable salt thereof, wherein: each of A, B, C, D, and E, independently, is C, N, N—H, O, S, or absent; is a single bond or a double bond; each of X, Y, and Z, independently, is aryl, heteroaryl, aralkyl, H, or absent; each of L1 and L2, independently, is a moiety selected from O, CH2, C?O, C2-10 alkyl, C2-10 alkenyl, C2-10 alkynyl, —((CH2)n—W)—, wherein n=0, 1, 2, 3, 4, or 5, and W is O or S, or absent; and when L2 is absent, Z is aryl or heteroaryl fused with BC. Also provided in the present invention is a method for inhibiting, treating and/or reducing the risk of a neuropsychiatric disorder, comprising administering a subject in need a composition comprising a compound of Formula (I).

Abstract: The present disclosure provides co-crystals of a lithium benzoate compound and a co-former compound of Formula (I) Also provided herein are methods of preparing the co-crystals and uses thereof in treating and/or reducing the risk for neuropsychiatric disorder (e.g., schizophrenia, psychotic disorders, depressive disorders, bipolar disorders, or neurogenerative disorders).

Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a first region and a second region; a first fin active region of a first semiconductor material disposed within the first region, oriented in a first direction, wherein the first fin active region has a <100> crystalline direction along the first direction; and a second fin active region of a second semiconductor material disposed within the second region and oriented in the first direction, wherein the second fin active region has a <110> crystalline direction along the first direction.

Abstract: An earphone device includes a speaker unit, an inner housing body and an outer housing body. The inner housing body covers the speaker unit through an insert molding technique. The outer housing body covers the inner housing body through the insert molding technique.

Abstract: Provided are co-crystals of a sodium benzoate compound and a co-former compound of Formula (I) Also provided herein are methods of preparing the co-crystals and uses thereof in treating and/or reducing the risk for a neuropsychiatric disorder (e.g., schizophrenia, psychotic disorders, depressive disorders, or Alzheimer's disease) or a glucose or lipid metabolic disorder (e.g., obesity, diabetes, hypercholesterolemia, hypertension, or hyperlipidemia).

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a first and second gate electrode layers, and a dielectric feature disposed between the first and second gate electrode layers. The dielectric feature has a first surface. The structure further includes a first conductive layer disposed on the first gate electrode layer. The first conductive layer has a second surface. The structure further includes a second conductive layer disposed on the second gate electrode layer. The second conductive layer has a third surface, and the first, second, and third surfaces are coplanar. The structure further includes a third conductive layer disposed over the first conductive layer, a fourth conductive layer disposed over the second conductive layer, and a dielectric layer disposed on the first surface of the dielectric feature. The dielectric layer is disposed between the third conductive layer and the fourth conductive layer.

Abstract: Self-aligned gate cutting techniques for multigate devices are disclosed herein that provide multigate devices having asymmetric metal gate profiles and asymmetric source/drain feature profiles. An exemplary multigate device has a channel layer, a metal gate that wraps a portion of the channel layer, and source/drain features disposed over a substrate. The channel layer extends along a first direction between the source/drain features. A first dielectric fin and a second dielectric fin are disposed over the substrate and configured differently. The channel layer extends along a second direction between the first dielectric fin and the second dielectric fin. The metal gate is disposed between the channel layer and the second dielectric fin. In some embodiments, the first dielectric fin is disposed on a first isolation feature, and the second dielectric fin is disposed on a second isolation feature. The first isolation feature and the second isolation feature are configured differently.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a source/drain feature on a semiconductor fin structure, a first isolation structure surrounding the semiconductor fin structure, source/drain spacers on the first isolation structure and surrounding a lower portion of the source/drain feature, a dielectric fin structure adjoining and in direct contact with the first isolation structure and one of the source/drain spacers, and an interlayer dielectric layer over the source/drain spacers and the dielectric fin structure and surrounding an upper portion of the source/drain feature.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method comprises forming a first stack structure and a second stack structure in a first area over a substrate, wherein each of the stack structures includes semiconductor layers separated and stacked up; depositing a first interfacial layer around each of the semiconductor layers of the stack structures; depositing a gate dielectric layer around the first interfacial layer; forming a dipole oxide layer around the gate dielectric layer; removing the dipole oxide layer around the gate dielectric layer of the second stack structure; performing an annealing process to form a dipole gate dielectric layer for the first stack structure and a non-dipole gate dielectric layer for the second stack structure; and depositing a first gate electrode around the dipole gate dielectric layer of the first stack structure and the non-dipole gate dielectric layer of the second stack structure.

Abstract: The problem of reducing noise in image sensing devices, especially NIR detectors, is solved by providing ground connections for the reflectors. The reflectors may be grounded through vias that couple the reflectors to grounded areas of the substrate. The grounded areas of the substrate may be P+ doped areas formed proximate the surface of the substrate. In particular, the P+ doped areas may be parts of photodiodes. Alternatively, the reflectors may be grounded through a metal interconnect structure formed over the front side of the substrate.

Abstract: A salt of a neuroceutical and of an acid, wherein the neuroceutical is a substituted benzodiazepine, a substituted benzothiazepine, a substituted pyridopyrimidines or a substituted amino-cyclohexaneacetic acid; and the acid is benzoic acid, nicotinic acid, pantothenic acid and tannic acid. The molar ratio of the neuroceutical and the acid in the salt ranges from about 6:1 to about 1:5. Also disclosed herein are compositions comprising the neuroceutical salt and therapeutic uses thereof for treating a central nervous system (CNS) disorder or a metabolic disorder associated with the CNS disorder.

Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a circuit assembly. The movable assembly is configured to connect an optical element, the movable assembly is movable relative to the fixed assembly, and the optical element has an optical axis. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The circuit assembly includes a plurality of circuits and is affixed to the fixed assembly.

Abstract: The present disclosure provides a method for treating arthritis by using a stem cell preparation. The stem cell preparation of the present disclosure can effectively delay cartilage degeneration caused by arthritis, and it is confirmed by whole blood analysis and blood biochemical analysis that the stem cell preparation in the form of three-dimensional stem cell spheres provides a safe treatment for arthritis. The present disclosure also provides a method for preparing the stem cell preparation.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a semiconductor fin structure over a substrate, forming a dielectric fin structure laterally spaced apart from the semiconductor fin structure, forming a source/drain spacer between the semiconductor fin structure and the dielectric fin structure, etching an upper portion of the semiconductor fin structure to expose a lower portion of the semiconductor fin structure, and forming a source/drain feature over the lower portion of the semiconductor fin structure. The source/drain spacer is interposed between the source/drain feature and the dielectric fin structure.

Abstract: Novel co-crystal and eutectic crystal of kojic acid and a co-former that are excellent in physical properties are provided. In one aspect, novel co-crystals of kojic acid and a co-former that is maltol or ethyl maltol are provided. In another aspect, novel crystal of a eutectic mixture of kojic acid and a co-former that is selected from the group consisting of, maltol, ethyl maltol, methyl paraben and propyl gallate are provided. Methods for producing the novel co-crystal or eutectic crystal are also described. The novel co-crystals and eutectic crystals may be included in a pharmaceutical composition, a health food product or a medical food product for the treatment and/or prophylaxis of a neuropsychiatric disorder.

Abstract: The present disclosure provides polymorphic forms of sodium benzoate with a X-ray diffraction pattern comprising characteristic peaks at a reflection angle 2? of approximately 5.9, 30.2, and 31.2 degrees; or a X-ray diffraction pattern comprising characteristic peaks at a reflection angle 2? of approximately 3.7, 5.9, and 26.6 degrees. The present disclosure provides polymorphic forms of sodium benzoate with a X-ray diffraction pattern comprising characteristic peaks at a reflection angle 2? of approximately 3.6, 7.5, 26.6, and 29.4 degrees. Also provided herein are methods of preparing the polymorphic forms of sodium benzoate and uses thereof in treating and/or reducing the risk for a neuropsychiatric disorder (e.g., schizophrenia, psychotic disorders, depressive disorders, or Alzheimer's disease).