Abstract: Method and apparatus for affine CPMV or ALF refinement are mentioned. According to this method, statistical data associated with the affine CPMV or ALF refinement are collected over a picture area. Updated parameters for the affine CPMV refinement or the ALF refinement are then derived based on the statistical data, where a process to derive the updated parameters includes performing multiplication using a reduced-precision multiplier for the statistical data. The reduced-precision multiplier truncates at least one bit of the mantissa part. In another embodiment, the process to derive the updated parameters includes performing reciprocal for the statistical data using a lookup table with (m?k)-bit input by truncating k bits from the m-bit mantissa part, and contents of the lookup table includes m-bit outputs. m and k are positive integers.

Abstract: Various schemes pertaining to pre-encoding processing of a video stream with motion compensated temporal filtering (MCTF) are described. An apparatus determines a filtering interval for a received raw video stream having pictures in a temporal sequence. The apparatus selects from the pictures a plurality of target pictures based on the filtering interval, as well as a group of reference pictures for each target picture to perform pixel-based MCTF, which generates a corresponding filtered picture for each target picture. The apparatus subsequently transmits the filtered pictures as well as non-target pictures to an encoder for encoding the video stream. Subpictures of natural images and screen content images are separately processed by the apparatus.

Abstract: The present invention relates to a method for producing recombinant human prethrombin-2 protein and having human ?-thrombin activity by the plant-based expression systems.

Abstract: A method includes forming a dummy gate stack over a fin protruding from a semiconductor substrate, forming gate spacers on sidewalls of the dummy gate stack, forming source/features over portions of the fin, forming a gate trench between the gate spacers, which includes trimming top portions of the gate spacers to form a funnel-like opening in the gate trench, and forming a metal gate structure in the gate trench. A semiconductor structure includes a fin protruding from a substrate, a metal gate structure disposed over the fin, gate spacers disposed on sidewalls of the metal gate structure, where a top surface of each gate spacer is angled toward the semiconductor fin, a dielectric layer disposed over the top surface of each gate spacer, and a conductive feature disposed between the gate spacers to contact the metal gate structure, where sidewalls of the conductive feature contact the dielectric layer.

Abstract: A method includes forming a semiconductor layer on a semiconductor substrate. The semiconductor layer is patterned to form a semiconductive structure. Each of widths of two ends of the semiconductive structure is wider than a width of a middle of the semiconductive structure. The semiconductive structure is doped to form a doped semiconductor structure. An isolation structure is formed to surround the doped semiconductor structure. A recessing process is performed such that two trenches are formed on the doped semiconductor structure, and first, second and third portions of an active region are formed on the semiconductor substrate. A first gate structure and a second gate structure are formed in the trenches such that the first portion and the third portion are partially spaced apart by the first gate structure, and the second portion and the third portion are partially spaced apart by the second gate structure.

Abstract: The present disclosure provides a method for preparing a semiconductor device with a T-shaped buried gate electrode. The method includes forming an isolation structure in a semiconductor substrate to define an active region, and forming a doped region in the active region. The method also includes etching the semiconductor substrate to form a first trench and a second trench. The first trench has a first portion extending across the doped region and a second portion extending away from the first portion, and the second trench has a third portion extending across the doped region and a fourth portion extending away from the third portion. The method further includes forming a first gate electrode in the first trench and a second gate electrode in the second trench.

Abstract: A method of manufacturing a semiconductor structure includes providing a substrate having an active region surrounded by an isolation layer; forming a first trench and a second trench in the active region, and a third trench and a fourth trench in the isolation layer; forming a bottom work-function layer in the third trench and the fourth trench, respectively; forming a middle work-function layer on the bottom work-function layer and in the first and the second trenches; forming a top work-function layer on the middle work-function layer; and forming a capping layer on the top work-function layer that fills a remaining region of the first, the second, the third and the fourth trenches.

Abstract: A semiconductor structure includes an active region, an isolation structure, a first gate structure, and a second gate structure. The active region is disposed over a semiconductor substrate and has a first portion, a second portion, and a third portion. The third portion is between the first portion and the second portion. A shape of the first portion is different from a shape of the third portion, in a top view. The isolation structure is disposed over the semiconductor substrate and surrounds the active region. The first gate structure is disposed between the first portion and the third portion of the active region. The second gate structure is disposed between the second portion and the third portion of the active region.

Abstract: A semiconductor structure includes a first semiconductor substrate, a second semiconductor substrate, a depletion layer, an isolation structure, a first gate structure, and a second gate structure. The first and second semiconductor substrates respectively have a first active region and a second active region overlapping the first active region. The depletion layer is disposed between the first active region and the second active region. The isolation structure surrounds the first and second active regions. The first gate structure is disposed in the second active region. The second gate structure is disposed in the second active region. The second active region has a portion between the first gate structure and the second gate structure.

Abstract: A method of manufacturing a semiconductor structure includes: receiving a substrate having an active region and a non-active region adjacent to the active region; forming an etch stop layer over the non-active region of the substrate, in which the etch stop layer is oxide-free; forming an isolation over the etch stop layer; removing a portion of the active region and a portion of the isolation to form a first trench in the active region and a second trench over the etch stop layer, respectively, in which a thickness of the etch stop layer beneath the second trench is greater than a depth difference between the first trench and the second trench; forming a dielectric layer in the first trench; and filling a conductive material on the dielectric layer in the first trench and in the second trench. A semiconductor structure is also provided.

Abstract: The present disclosure provides a semiconductor device with a T-shaped buried gate electrode and a method for forming the semiconductor device. The semiconductor device includes a semiconductor substrate having an active region, and a first gate electrode disposed in the semiconductor substrate. The semiconductor device also includes a first source/drain region and a second source/drain region disposed in the active region and at opposite sides of the first gate electrode. The first gate electrode has a first portion extending across the active region and a second portion extending into the first source/drain region.

Abstract: A method of manufacturing a semiconductor structure includes providing a substrate having an active region surrounded by an isolation layer; forming a first trench and a second trench in the active region, and a third trench and a fourth trench in the isolation layer; forming a bottom work-function layer in the third trench and the fourth trench, respectively; forming a middle work-function layer on the bottom work-function layer and in the first and the second trenches; forming a top work-function layer on the middle work-function layer; and forming a capping layer on the top work-function layer that fills a remaining region of the first, the second, the third and the fourth trenches.

Abstract: A semiconductor structure includes a substrate, a first word line structure, a second word line structure, a third word line structure, and a fourth word line structure. The substrate has an active region surrounded by an isolation structure. The first and second word line structures are disposed in the active region and separated from each other. The third and fourth word line structures are disposed in the isolation structure, and each of the third and the fourth word line structures includes a bottom work-function layer, a middle work-function layer on the bottom work-function layer, and a top work function layer on the work-function middle layer. The middle work-function layer has a work-function that is higher than a work-function of the top work-function layer and a work-function of the bottom work-function layer.

Abstract: A method includes forming a semiconductor layer on a semiconductor substrate. The semiconductor layer is patterned to form a semiconductive structure. Each of widths of two ends of the semiconductive structure is wider than a width of a middle of the semiconductive structure. The semiconductive structure is doped to form a doped semiconductor structure. An isolation structure is formed to surround the doped semiconductor structure. A recessing process is performed such that two trenches are formed on the doped semiconductor structure, and first, second and third portions of an active region are formed on the semiconductor substrate. A first gate structure and a second gate structure are formed in the trenches such that the first portion and the third portion are partially spaced apart by the first gate structure, and the second portion and the third portion are partially spaced apart by the second gate structure.

Abstract: The present disclosure provides a method for preparing a semiconductor device with a T-shaped buried gate electrode. The method includes forming an isolation structure in a semiconductor substrate to define an active region, and forming a doped region in the active region. The method also includes etching the semiconductor substrate to form a first trench and a second trench. The first trench has a first portion extending across the doped region and a second portion extending away from the first portion, and the second trench has a third portion extending across the doped region and a fourth portion extending away from the third portion. The method further includes forming a first gate electrode in the first trench and a second gate electrode in the second trench.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device comprises a substrate, a plurality of isolation regions in the substrate and an active region surrounded by the isolation regions. A p-type doped region is interposed between two n-type doped regions in the substrate. A buried gate structure is formed in the substrate and disposed between the p-type doped region and the n-type doped region. The buried gate structure comprises a gate conductive material, a gate insulating layer disposed over the gate conductive material and a gate liner surrounding the gate conductive material and the gate insulating layer. A plurality of contact plugs are formed on the p-type doped region and the plurality of n-type doped regions.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device comprises a substrate, a plurality of isolation regions in the substrate and an active region surrounded by the isolation regions. A p-type doped region is interposed between two n-type doped regions in the substrate. A buried gate structure is formed in the substrate and disposed between the p-type doped region and the n-type doped region. The buried gate structure comprises a gate conductive material, a gate insulating layer disposed over the gate conductive material and a gate liner surrounding the gate conductive material and the gate insulating layer. A plurality of contact plugs are formed on the p-type doped region and the plurality of n-type doped regions.

Abstract: The present disclosure provides a semiconductor device with a T-shaped buried gate electrode and a method for forming the semiconductor device. The semiconductor device includes a semiconductor substrate having an active region, and a first gate electrode disposed in the semiconductor substrate. The semiconductor device also includes a first source/drain region and a second source/drain region disposed in the active region and at opposite sides of the first gate electrode. The first gate electrode has a first portion extending across the active region and a second portion extending into the first source/drain region.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device comprises a substrate, a plurality of isolation regions in the substrate and an active region surrounded by the isolation regions. A p-type doped region is interposed between two n-type doped regions in the substrate. A buried gate structure is formed in the substrate and disposed between the p-type doped region and the n-type doped region. The buried gate structure comprises a gate conductive material, a gate insulating layer disposed over the gate conductive material and a gate liner surrounding the gate conductive material and the gate insulating layer. A plurality of contact plugs are formed on the p-type doped region and the plurality of n-type doped regions.

Abstract: A method of manufacturing a semiconductor structure includes: receiving a substrate having an active region and a non-active region adjacent to the active region; forming an etch stop layer over the non-active region of the substrate, in which the etch stop layer is oxide-free; forming an isolation over the etch stop layer; removing a portion of the active region and a portion of the isolation to form a first trench in the active region and a second trench over the etch stop layer, respectively, in which a thickness of the etch stop layer beneath the second trench is greater than a depth difference between the first trench and the second trench; forming a dielectric layer in the first trench; and filling a conductive material on the dielectric layer in the first trench and in the second trench. A semiconductor structure is also provided.