Patents by Inventor Ching-Chung Cheng

Ching-Chung Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11575496
    Abstract: A retiming circuit module, a signal transmission system and a signal transmission method are disclosed. The retiming circuit module includes a path control circuit and a multipath signal transmission circuit. The multipath signal transmission circuit includes a plurality of parallel signal transmission paths. The path control circuit is configured to control the multipath signal transmission circuit to perform signal transmission between an upstream device and a downstream device based on a first parallel signal transmission path in the parallel signal transmission paths during a period of a handshake operation performed between the upstream device and the downstream device. The path control circuit is further configured to control the multipath signal transmission circuit to perform the signal transmission based on a second parallel signal transmission path in the parallel signal transmission paths after the handshake operation is finished.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: February 7, 2023
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Jen-Chu Wu, Ching-Jui Hsiao, Chun-Wei Chang, Sheng-Wen Chen, Ching-Chung Cheng
  • Patent number: 11489516
    Abstract: A deskew circuit for a differential signal is provided. A first common mode voltage generating circuit generates a first common mode voltage signal according to first and second differential input signals. A voltage buffer circuit is coupled to the first common mode voltage generating circuit and has an input impedance higher than a preset value, and buffers the first common mode voltage signal and the first and second differential input signals to generate a second common mode voltage signal, a third differential input signal, and a fourth differential input signal. A second common mode voltage generating circuit is coupled to the voltage buffer circuit and generates a third common mode voltage signal according to the third and fourth differential input signals. An output circuit generates a deskew output signal according to the third and fourth differential input signals and the second and third common mode voltage signals.
    Type: Grant
    Filed: November 26, 2021
    Date of Patent: November 1, 2022
    Assignee: ALi Corporation
    Inventors: Ming-Ta Lee, Ching-Chung Cheng
  • Patent number: 11403994
    Abstract: A light emitting assembly includes active matrix (AM) light emitting circuits and an AM driver circuit. Each AM light emitting circuit includes at least one light emitting element, at least one shift register and a current control sub-circuit. The at least one shift register is configured to generate a control signal according to the clock signal from a clock line and the data signal from an inter-array data line and the control signal from the at least one shift register. The current control sub-circuit is configured to control the brightness of the at least one light emitting element according to the base current from a current supply line and the control signal. The AM driver circuit is configured to generate the data signal according to a serial data packet, and provide the data signal, the clock signal and the base current to the AM light emitting circuits.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: August 2, 2022
    Inventors: Chin-Chih Cheng, Ching-Chung Cheng
  • Publication number: 20220230580
    Abstract: A light emitting assembly includes active matrix (AM) light emitting circuits and an AM driver circuit. Each AM light emitting circuit includes at least one light emitting element, at least one shift register and a current control sub-circuit. The at least one shift register is configured to generate a control signal according to the clock signal from a clock line and the data signal from an inter-array data line and the control signal from the at least one shift register. The current control sub-circuit is configured to control the brightness of the at least one light emitting element according to the base current from a current supply line and the control signal. The AM driver circuit is configured to generate the data signal according to a serial data packet, and provide the data signal, the clock signal and the base current to the AM light emitting circuits.
    Type: Application
    Filed: March 29, 2021
    Publication date: July 21, 2022
    Inventors: CHIN-CHIH CHENG, CHING-CHUNG CHENG
  • Publication number: 20220182047
    Abstract: A deskew circuit for a differential signal is provided. A first common mode voltage generating circuit generates a first common mode voltage signal according to first and second differential input signals. A voltage buffer circuit is coupled to the first common mode voltage generating circuit and has an input impedance higher than a preset value, and buffers the first common mode voltage signal and the first and second differential input signals to generate a second common mode voltage signal, a third differential input signal, and a fourth differential input signal. A second common mode voltage generating circuit is coupled to the voltage buffer circuit and generates a third common mode voltage signal according to the third and fourth differential input signals. An output circuit generates a deskew output signal according to the third and fourth differential input signals and the second and third common mode voltage signals.
    Type: Application
    Filed: November 26, 2021
    Publication date: June 9, 2022
    Applicant: ALi Corporation
    Inventors: Ming-Ta Lee, Ching-Chung Cheng
  • Patent number: 10411458
    Abstract: An overvoltage protection device including an output stage, a first switch and a first load providing circuit is provided. The output stage has a first input terminal to receive a first signal, and generates an output signal at an output terminal of the output stage according to the first signal. A first terminal of the first switch is coupled to the first input terminal of the output stage, and a control terminal of the first switch receives a second signal. The first signal is the delayed second signal. The first load providing circuit is coupled to a second terminal of the first switch. The first load providing circuit provides an impedance to the first input terminal when the first switch is turned on.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: September 10, 2019
    Assignee: ALi Corporation
    Inventors: Ching-Chung Cheng, Kuo-Kai Lin
  • Publication number: 20170346273
    Abstract: An overvoltage protection device including an output stage, a first switch and a first load providing circuit is provided. The output stage has a first input terminal to receive a first signal, and generates an output signal at an output terminal of the output stage according to the first signal. A first terminal of the first switch is coupled to the first input terminal of the output stage, and a control terminal of the first switch receives a second signal. The first signal is the delayed second signal. The first load providing circuit is coupled to a second terminal of the first switch. The first load providing circuit provides an impedance to the first input terminal when the first switch is turned on.
    Type: Application
    Filed: March 13, 2017
    Publication date: November 30, 2017
    Applicant: ALi Corporation
    Inventors: Ching-Chung Cheng, Kuo-Kai Lin
  • Patent number: 9396155
    Abstract: An envelope detection device for detecting a transmission signal of a high speed serial communication includes: an operation circuit, for receiving the transmission signal and generating a set of operated outputs according to the transmission signal and at least one reference signal; a reference signal generating circuit coupled to the operation circuit, for providing the reference signal to the operation circuit, wherein the reference signal generating circuit is operable to provide the reference signal with different voltage levels; and a comparing circuit coupled to the operation circuit, for comparing the set of calculated outputs to generate a comparison result. The envelope detection device detects a transmission state and a disconnect state of the high speed serial communication according to the comparison result generated based on the reference signals at different voltage levels.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: July 19, 2016
    Assignee: ALI Corporation
    Inventors: Kuo-Kai Lin, Wei-Chun Kao, Ching-Chung Cheng
  • Publication number: 20160103781
    Abstract: An envelope detection device for detecting a transmission signal of a high speed serial communication includes: an operation circuit, for receiving the transmission signal and generating a set of operated outputs according to the transmission signal and at least one reference signal; a reference signal generating circuit coupled to the operation circuit, for providing the reference signal to the operation circuit, wherein the reference signal generating circuit is operable to provide the reference signal with different voltage levels; and a comparing circuit coupled to the operation circuit, for comparing the set of calculated outputs to generate a comparison result. The envelope detection device detects a transmission state and a disconnect state of the high speed serial communication according to the comparison result generated based on the reference signals at different voltage levels.
    Type: Application
    Filed: January 20, 2015
    Publication date: April 14, 2016
    Inventors: Kuo-Kai Lin, Wei-Chun Kao, Ching-Chung Cheng
  • Patent number: 9051649
    Abstract: Provided is a physical vapor deposition apparatus with one or multiple deposition chambers for depositing films on substrates. The deposition chambers includes a heater and various cooling features to cool the chamber, the heater and the substrate. The sidewalls and top of the chamber are cooled by a cooling feature. The heater includes a cooling plate. A fitted heated cover is disposed between the heater and the substrate. A cooling pipe delivers a coolant throughout the cooling plate and extends in a high spatial density throughout the surface of the cooling plate. The cooling pipe occupies an area of about 14-20% of the area of the cooling plate and no location on the cooling plate surface is greater than about 15-20 mm from the cooling pipe. The cooling pipe cools the heater rapidly and enables deposition operations of long duration and using high power to be carried out.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: June 9, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Pao-Tsung Lai, Chia-Chiun Chen, Ching-Chung Cheng, Chi-Feng Chen
  • Patent number: 7081706
    Abstract: A plasma display panel with a plurality of non-transparent display electrode pairs and a method of forming the same. Each electrode of every non-transparent display electrode pair is separated from but close to one another for effective discharging. For effective displaying, it is necessary that the area of the non-transparent display electrodes is smaller than the area of the panel. In the present invention, the shape of the non-transparent display electrodes are manufactured in a shape with a plurality of openings, such as a ladder or a chain.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: July 25, 2006
    Assignee: Chungwa Picture Tubes, Ltd.
    Inventors: Wen-Rung Huang, Ching-Chung Cheng, Yuan-Chi Lin, Yu-Wen Chen
  • Patent number: 6960497
    Abstract: The present invention provides a method for improving the adhesion capability between the ?-type bus electrode and ITO (indium tin oxide) transparent conductive layer. The method includes an ITO transparent conductive layer as an ITO electrode is formed on the glass substrate by sputtering method. Then, a photoresist layer with a cavity pattern is formed on the portion of the ITO transparent conductive film. Next, an etching process is used to remove portion of the ITO transparent conductive film to form a cavity within the ITO transparent conductive film. Then, after removing the photoresist layer, a silver paste as a bus electrode is formed on the glass substrate and on the ITO transparent conductor film to form a pi (?) type bus electrode by print method.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: November 1, 2005
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Wen-Rung Huang, Yuan-Chi Lin, Ching-Chung Cheng, Sheng-Chi Lee
  • Patent number: 6900591
    Abstract: A driving electrode structure of a plasma display panel for improving operation margin is described. A plurality openings is formed in a transparent electrode according to the driving characteristics of fluorescent layer of each luminous cell to adjust the effective area of the transparent electrode in each luminous cell, thereby increasing the operation margin of the sustaining voltage.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: May 31, 2005
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Wen-Rung Huang, Hsu-Pin Kao, Yu-Ju Chen, Ching-Chung Cheng, Yen-Ting Shen
  • Publication number: 20050084805
    Abstract: A method for forming a patterned ITO structure by using a photosensitive ITO solution is provided. By mixing both the ITO and photosensitive material to form a photosensitive ITO solution on a substrate, a patterned ITO structure is available by directly exposing and developing the photosensitive ITO layer. Significantly, no photo-resist layer is required.
    Type: Application
    Filed: October 20, 2003
    Publication date: April 21, 2005
    Inventors: Lu-Yi Yang, Ching-Chung Cheng, Yen-Ting Shen, Yuan-Chi Lin
  • Patent number: 6881117
    Abstract: A bus electrode of the present invention is formed by first coating a Ru-containing layer on the front plate and the transparent electrodes. Then, an Ag-containing layer is coated over the Ru-containing layer. In accordance with the present invention, the coating area of the Ru-containing layer is larger than the coating area of the Ag-containing layer to improve adhesion between the bus electrodes, glass plate and the transparent electrodes. Then, a photolithography process is performed to define the bus electrodes.
    Type: Grant
    Filed: April 7, 2003
    Date of Patent: April 19, 2005
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Wen-Rung Huang, Cheng-Min Chen, Ching-Chung Cheng, Shun-An Lin
  • Patent number: 6864632
    Abstract: An front plate structure for a plasma display panel is described. In accordance with the present invention, a protruding space pad structure is formed on the dielectric layer or protective layer of the front plate. The space pad is used to form the height difference on the surface of the front plate, about 3 ?m to 15 ?m. The height difference forms gas channels between the front plate and the discharge region to improve the performance of the vacuuming and refilling gas steps.
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: March 8, 2005
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Hsu-Pin Kao, Hsiang-Hui Tseng, Sheng-Wen Hsu, Ching-Chung Cheng
  • Publication number: 20040266071
    Abstract: The present invention provides a method for improving the adhesion capability between the &pgr;-type bus electrode and ITO (indium tin oxide) transparent conductive layer. The method includes an ITO transparent conductive layer as an ITO electrode is formed on the glass substrate by sputtering method. Then, a photoresist layer with a cavity pattern is formed on the portion of the ITO transparent conductive film. Next, an etching process is used to remove portion of the ITO transparent conductive film to form a cavity within the ITO transparent conductive film. Then, after removing the photoresist layer, a silver paste as a bus electrode is formed on the glass substrate and on the ITO transparent conductor film to form a pi (&pgr;) type bus electrode by print method.
    Type: Application
    Filed: June 25, 2003
    Publication date: December 30, 2004
    Inventors: Wen-Rung Huang, Yuan-Chi Lin, Ching-Chung Cheng, Sheng-Chi Lee
  • Publication number: 20040217707
    Abstract: The present invention provides a transparent electrode structure for a plasma display panel. The transparent electrode structure has a body and two connecting parts. This body is connected to the branches of the comb electrode through the two connecting parts to make the body protrud toward the center of the luminant unit. A hollow exists between the transparent electrode and the main line of the comb electrode.
    Type: Application
    Filed: September 16, 2003
    Publication date: November 4, 2004
    Inventors: Hsu-Pin Kao, Sheng-Wen Hsu, Ching-Chung Cheng
  • Publication number: 20040183440
    Abstract: The pla sma display panel has some pairs of non-transparent discharge electrodes. Herein, no transparent discharge electrode is desired. Herein, for each pair, the non-transparent discharge electrodes are separated but closed to effectively discharge. Besides, the area of the non-transparent discharge electrodes is clearly smaller than the area of the panel. Furthermore, the shape of each non-transparent discharge electrode is alike to a shape with some openings, such as ladder or chain.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 23, 2004
    Inventors: Wen-Rung Huang, Ching-Chung Cheng, Yuan-Chi Lin, Yu-Wen Chen
  • Publication number: 20040147196
    Abstract: A bus electrode of the present invention is formed by first coating a Ru-containing layer on the front plate and the transparent electrodes. Then, an Ag-containing layer is coated over the Ru-containing layer. In accordance with the present invention, the coating area of the Ru-containing layer is larger than the coating area of the Ag-containing layer to improve adhesion between the bus electrodes, glass plate and the transparent electrodes. Then, a photolithography process is performed to define the bus electrodes.
    Type: Application
    Filed: April 7, 2003
    Publication date: July 29, 2004
    Applicant: CHUNGHWA PICTURE TUBES, LTD.
    Inventors: Wen-Rung Huang, Cheng-Min Chen, Ching-Chung Cheng, Shun-An Lin