Abstract: A method for dynamically managing host read operation and read refresh operation in a storage device, a storage device and a storage medium thereof are provided. The method includes: controlling, by a controller of the storage device, a ratio of the number of host read operation to the number of read refresh operation in the storage device to be in line with a first value and obtaining a total read request count which accumulates in the storage device; when a criterion for updating the ratio is satisfied, determining, by the controller, a second value for the ratio of the number of host read operation to the number of read refresh operation according to the total read request count and information of blocks to be refreshed in the storage device; and controlling, by the controller, the number of host read operation and the number of read refresh operation so that a ratio of the number of host read operation to the number of read refresh operation is in line with the second value.

Abstract: A method for assigning a plurality of channel of a storage device for stream data writing, a storage device and a storage medium are provided. The method includes: providing global available channel status data and stream suitable channel status data for one of a plurality of streams by a controller of the storage device for processing stream data writing for the plurality of streams; generating stream available channel status data for the one of the plurality of streams, based on the global available channel status data and the stream suitable channel status data for the stream; selecting at least one available channel of the plurality of channels according to the stream available channel status data; and updating the global available channel status data with respect to the at least one available channel selected and updating the stream suitable channel status data for one of the plurality of streams.

Abstract: A method for dynamically managing host read operation and read refresh operation in a storage device, a storage device and a storage medium thereof are provided. The method includes: controlling, by a controller of the storage device, a ratio of the number of host read operation to the number of read refresh operation in the storage device to be in line with a first value and obtaining a total read request count which accumulates in the storage device; when a criterion for updating the ratio is satisfied, determining, by the controller, a second value for the ratio of the number of host read operation to the number of read refresh operation according to the total read request count and information of blocks to be refreshed in the storage device; and controlling, by the controller, the number of host read operation and the number of read refresh operation so that a ratio of the number of host read operation to the number of read refresh operation is in line with the second value.

Abstract: The memory system comprises nonvolatile memory devices each including plural superblocks and a controller. The controller is configured to select a victim superblock including a smaller number of valid pages than any among remaining superblocks, exchange a greater-valid-pages block with a smaller-valid-pages block, and control the memory device to perform a garbage collection operation on the victim superblock, wherein the greater-valid-pages block is included in the victim superblock and the smaller-valid-pages block is included in one among the remaining superblocks, and wherein the smaller-valid-pages block has a smaller number of valid pages than the greater-valid-pages block.

Abstract: A method for assigning a plurality of channel of a storage device for stream data writing, a storage device and a storage medium are provided. The method includes: providing global available channel status data and stream suitable channel status data for one of a plurality of streams by a controller of the storage device for processing stream data writing for the plurality of streams; generating stream available channel status data for the one of the plurality of streams, based on the global available channel status data and the stream suitable channel status data for the stream; selecting at least one available channel of the plurality of channels according to the stream available channel status data; and updating the global available channel status data with respect to the at least one available channel selected and updating the stream suitable channel status data for one of the plurality of streams.

Abstract: The memory system comprises nonvolatile memory devices each including plural superblocks and a controller. The controller is configured to select a victim superblock including a smaller number of valid pages than any among remaining superblocks, exchange a greater-valid-pages block with a smaller-valid-pages block, and control the memory device to perform a garbage collection operation on the victim superblock, wherein the greater-valid-pages block is included in the victim superblock and the smaller-valid-pages block is included in one among the remaining superblocks, and wherein the smaller-valid-pages block has a smaller number of valid pages than the greater-valid-pages block.

Abstract: A control method of a storage device may include the steps of determining, by a storage device controller of the storage device, whether the storage device has to move internal data; deciding, by the storage device controller, a data movement allocation ratio based on at least some of internal data movement requests and the number of free pages in the storage device, when it is determined that the storage device has to move internal data; and allocating, by the storage device controller, one or more programming times to complete a first data number of internal data movement operations corresponding to at least some of the internal data movement requests and a second data number of host data write operations, such that the ratio of the first and second data numbers coincides with the data movement allocation ratio.

Abstract: A control method of a storage device wherein a host cannot transfer a command to the storage device when the storage device transfers data to the host, after which there is a data transfer delay time period and no data is transferred to the host until a read command is received from the host, the control method comprising the steps of: detecting, by a memory controller of the storage device, a host delay time of the host each time a read command is received from the host during the data transfer delay time period; and adjusting, by the memory controller, the data transfer delay time period based on one or more of the detected host delay times.

Abstract: A control method of a storage device may include the steps of determining, by a storage device controller of the storage device, whether the storage device has to move internal data; deciding, by the storage device controller, a data movement allocation ratio based on at least some of internal data movement requests and the number of free pages in the storage device, when it is determined that the storage device has to move internal data; and allocating, by the storage device controller, one or more programming times to complete a first data number of internal data movement operations corresponding to at least some of the internal data movement requests and a second data number of host data write operations, such that the ratio of the first and second data numbers coincides with the data movement allocation ratio.

Abstract: A memory access method for selectively creating a simplified mapping table includes the steps of: selecting one of a plurality of partitions of an original mapping table so as to use one physical page address in a selected partition as a start physical page address; scanning each entry of the selected partition so as to search a randomly mapped entry in the selected partition; determining whether a memory space required for creating the simplified mapping table is smaller than a memory space required for the selected partition; and selectively storing the start physical page address, the number of the randomly mapped entries, and a logical page address and a physical page address recorded on each randomly mapped entry according to the determination result of the determining step so as to create a simplified mapping table.

Abstract: A control method of a storage device wherein a host cannot transfer a command to the storage device when the storage device transfers data to the host, after which there is a data transfer delay time period and no data is transferred to the host until a read command is received from the host, the control method comprising the steps of: detecting, by a memory controller of the storage device, a host delay time of the host each time a read command is received from the host during the data transfer delay time period; and adjusting, by the memory controller, the data transfer delay time period based on one or more of the detected host delay times.

Abstract: A control method of a memory device may include: (a) reading a read request of a host; (b) determining, by the processor, whether a logical address corresponding to the read request of the host is present in a cache; and (c) generating, by the processor, a data read command according the read request when the determination result of (b) indicates that the logical address corresponding to the read request is present in the cache, and transferring, by the processor, the data read command to one of the plurality of memory channels which corresponds to the physical address, in order to process the data read command.

Abstract: A memory access method for selectively creating a simplified mapping table includes the steps of: selecting one of a plurality of partitions of an original mapping table so as to use one physical page address in a selected partition as a start physical page address; scanning each entry of the selected partition so as to search a randomly mapped entry in the selected partition; determining whether a memory space required for creating the simplified mapping table is smaller than a memory space required for the selected partition; and selectively storing the start physical page address, the number of the randomly mapped entries, and a logical page address and a physical page address recorded on each randomly mapped entry according to the determination result of the determining step so as to create a simplified mapping table.

Abstract: Disclosed are a memory storage device and an operating method thereof. The operating method writes data to a plurality of memory devices of the memory storage device through a controller, and performs interleaving programming on the plurality of memory devices. The operating method includes a write request step, a read request step, a page temporary storage area write step, and a device switching step, which are repeated until the respective memory devices complete the above-described steps and a page temporary storage area programming step. Before the page temporary storage area programming step is performed, data transmitted to page temporary storage areas of the respective memory devices are temporarily stored in the page temporary storage areas. Thus, the number of SRAMs can be, reduced, and a programming operation can be performed on a plurality of memory devices at the same time.

Abstract: The present invention is directed to an improved metal strips straightener, including an infeed device and a pressure frame. The infeed device has one or more leveling rollers, and the pressure frame has a roller frame. The roller frame has one or more roller blocks to bring a metal strip into a upward full encirclement wrap. Each roller block is attached with a camshaft, where each camshaft is connected to a motorized drive system. Rotation of the camshafts actuates the roller blocks to move the metal strips, applying pressure on the metal strips during the passing through of the roller blocks. A closing cylinder is attached to one end of a roller block, where the closing cylinder has a convex contact surface. Multiple roller blocks are connected to each adjacent roller blocks via their connected closing cylinders.

Abstract: Disclosed are a memory storage device and an operating method thereof. The operating method writes data to a plurality of memory devices of the memory storage device through a controller, and performs interleaving programming on the plurality of memory devices. The operating method includes a write request step, a read request step, a page temporary storage area write step, and a device switching step, which are repeated until the respective memory devices complete the above-described steps and a page temporary storage area programming step. Before the page temporary storage area programming step is performed, data transmitted to page temporary storage areas of the respective memory devices are temporarily stored in the page temporary storage areas. Thus, the number of SRAMs can be, reduced, and a programming operation can be performed on a plurality of memory devices at the same time.

Abstract: The present invention is directed to an improved metal strips straightener, including an infeed device and a pressure frame. The infeed device has one or more leveling rollers, and the pressure frame has a roller frame. The roller frame has one or more roller blocks to bring a metal strip into a upward full encirclement wrap. Each roller block is attached with a camshaft, where each camshaft is connected to a motorized drive system. Rotation of the camshafts actuates the roller blocks to move the metal strips, applying pressure on the metal strips during the passing through of the roller blocks. A closing cylinder is attached to one end of a roller block, where the closing cylinder has a convex contact surface. Multiple roller blocks are connected to each adjacent roller blocks via their connected closing cylinders.

Abstract: A chip test method is suitable for testing a universal serial bus host controller. First, the host controller and the client device are individually set in a test mode. Next, the client device performs a client-side test preparation action. In addition, the host controller performs a host-side test preparation action. The host controller sequentially outputs a number of requests to the client device. The client device, in response to the requests, outputs simulated responses individually to the host controller, wherein the simulated responses are selected from correct responses corresponding to the requests, possible faulty responses, and error responses that are possibly to be received by the host controller during actual operation. Finally, the host controller performs a verification test to verify whether the host controller works properly under the various simulated situations.

Abstract: A USB controlling apparatus for data transfer between computers and method for the same are provided. The apparatus comprises a host controller providing a host function of USB interface; a device function circuit providing a device function of USB interface; at least one connection for connecting to a USB device or a USB cable by way of data transfer; and a path switch unit. The path switch unit connected to the host controller, device function circuit and the USB data lines, used to switch a connection path of the USB data lines between the host controller and the device function circuit, which is able to provide a host function mode to connect USB apparatus for data transmitting or a device function mode to connect with other computer host for data transmitting.

Abstract: Disclosed is an integrated PCI interface card, comprising a multi-functional IC chip, a first set of signal lines, a mono-functional IC chip, and a second set of signal lines. The multi-functional IC chip includes a plurality of functional circuits and an arbiter, and each of the first set of signal lines and the second set of signal lines includes the signal lines required in the PCI bus transactions. The first set of signal lines is arranged to couple the multi-functional IC chip to a PCI bus, and a request signal line, a grant signal line, and an initialization device select signal line of the second set of signal lines are arranged to couple the multi-functional IC chip and the mono-functional IC chip, while the other signal lines of the second set of signal lines are arranged to couple the mono-functional IC chip to the PCI bus.