Patents by Inventor Ching Elizabeth Ho

Ching Elizabeth Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11048323
    Abstract: An apparatus includes a plurality of processor cores, a cache memory that includes a plurality of banks, and a power management circuit. The power management circuit is configured to maintain a power credit approach for the apparatus that includes tracking a total number of currently available power credits, and to store a plurality of threshold values. Each threshold value is associated with one or more of a plurality of throttling actions. In response to the total number of currently available power credits reaching a particular threshold value of the plurality of threshold values, the power management circuit performs the one or more throttling actions associated with the particular threshold value. The plurality of throttling actions includes selectively throttling one or more of the plurality of processor cores, and selectively throttling one or more of the plurality of banks in the cache memory.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: June 29, 2021
    Assignee: Apple Inc.
    Inventors: Ching Elizabeth Ho, Hao Chen, Nitin Bhargava, Syed F. Ali
  • Publication number: 20200341533
    Abstract: An apparatus includes a plurality of processor cores, a cache memory that includes a plurality of banks, and a power management circuit. The power management circuit is configured to maintain a power credit approach for the apparatus that includes tracking a total number of currently available power credits, and to store a plurality of threshold values. Each threshold value is associated with one or more of a plurality of throttling actions. In response to the total number of currently available power credits reaching a particular threshold value of the plurality of threshold values, the power management circuit performs the one or more throttling actions associated with the particular threshold value. The plurality of throttling actions includes selectively throttling one or more of the plurality of processor cores, and selectively throttling one or more of the plurality of banks in the cache memory.
    Type: Application
    Filed: April 29, 2019
    Publication date: October 29, 2020
    Inventors: Ching Elizabeth Ho, Hao Chen, Nitin Bhargava, Syed F. Ali
  • Patent number: 6263306
    Abstract: A technique for obtaining an intermediate set of frequency dependant features from a speech signal for use in speech processing and in obtaining estimates of speech pitch. The technique utilizes multiple tapers derived from Slepian sequences to obtain a product of the speech signal and the Slepian functions. Multiple tapered Fourier transforms are then obtained from the product, from which the set of frequency dependent features are calculated. In a preferred embodiment, a derivative of the cepstrum of the speech signal is used as an estimate of speech signal pitch. In another preferred embodiment, the F-spectrum is calculated from the product and the F-cepstrum is obtained therefrom by calculating the Fourier transform of the smoothed derivative of the log of the F-spectrum. The maximum of the F-cepstrum also provides a pitch estimation.
    Type: Grant
    Filed: February 26, 1999
    Date of Patent: July 17, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: Michael Sean Fee, Ching Elizabeth Ho, Partha Pratim Mitra, Bijan Pesaran