Patents by Inventor Ching-En Huang

Ching-En Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12002807
    Abstract: A semiconductor structure includes a substrate including a first region and a second region; a first device disposed in the first region and a second device disposed in the second region; a first isolation disposed in the first region, wherein the first isolation is between a first source and a first drain, a first spacer overlaps the first isolation, the first isolation is separated from the first spacer by a first gate dielectric.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jing-Jung Huang, Ching En Chen, Jung-Hui Kao, Kong-Beng Thei
  • Patent number: 11996409
    Abstract: A semiconductor structure includes a power rail, a first source/drain feature disposed over the power rail, a via connecting the power rail to the first source/drain feature; an isolation feature disposed over the first source/drain feature, and a second source/drain feature disposed over the isolation feature, where the first and the second source/drain features are of opposite conductivity types.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Xuan Huang, Chia-En Huang, Ching-Wei Tsai, Kuan-Lun Cheng
  • Publication number: 20240170613
    Abstract: An optoelectronic semiconductor element is provided. The optoelectronic semiconductor element includes a semiconductor stack and a first metal layer. The semiconductor stack includes a first portion and a second portion stacked in sequence, with the second portion including an active region. The first metal layer is located on the first portion and is electrically connected to the first portion. A top-view outline of the first portion shows a first pattern, a top-view outline of the second portion shows a second pattern, and a top-view outline of the first metal layer shows a third pattern. The area ratio of the third pattern to the first pattern is from 0.5% to 10%.
    Type: Application
    Filed: November 16, 2023
    Publication date: May 23, 2024
    Inventors: Ching-En Huang, Chuang-Sheng Lin, Hao-Ming Ku, Shih-I Chen
  • Patent number: 11948972
    Abstract: The present disclosure is directed to methods for the formation of high-voltage nano-sheet transistors and low-voltage gate-all-around transistors on a common substrate. The method includes forming a fin structure with first and second nano-sheet layers on the substrate. The method also includes forming a gate structure having a first dielectric and a first gate electrode on the fin structure and removing portions of the fin structure not covered by the gate structure. The method further includes partially etching exposed surfaces of the first nano-sheet layers to form recessed portions of the first nano-sheet layers in the fin structure and forming a spacer structure on the recessed portions. In addition, the method includes replacing the first gate electrode with a second dielectric and a second gate electrode, and forming an epitaxial structure abutting the fin structure.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Xuan Huang, Chia-En Huang, Ching-Wei Tsai, Kuan-Lun Cheng, Yih Wang
  • Publication number: 20240097403
    Abstract: A laser device is provided. The laser device includes a stack of epitaxial layers, a first conductive layer, an intermediate layer, and a first electrode. The stack of epitaxial layers has a central region and an edge region. The stack of epitaxial layers includes a first reflective structure, an active region disposed on the first reflective structure, a second reflective structure disposed on the active region. The first conductive layer disposes on the stack of epitaxial layers and covers the central region and at least a part of the edge region. The intermediate layer has a first opening that corresponding to the central region of the stack of epitaxial layers, wherein the intermediate layer comprises insulating material or metal. The first electrode disposes on the first conductive layer.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 21, 2024
    Inventors: Jung-Jen Li, Ching-En Huang, Hao-Ming Ku, Shih-I Chen
  • Publication number: 20240021772
    Abstract: An optoelectronic semiconductor device is provided. The optoelectronic semiconductor device includes an epitaxial stack, a trench, a concave portion, a first contact structure, and a first electrode. The epitaxial stack includes a first semiconductor structure, an active structure on the first semiconductor structure, and a second semiconductor structure on the active structure, wherein the epitaxial stack has a first portion and a second portion, and the second semiconductor structure of the first portion is separated from the second semiconductor structure of the second portion. The trench is located between the first portion and the second portion. The concave portion is located in the first portion. The first contact structure is located in the concave portion. The first electrode covers the first contact structure. When the optoelectronic semiconductor device is operating, the first portion does not emit light.
    Type: Application
    Filed: July 14, 2023
    Publication date: January 18, 2024
    Inventors: Ching-En Huang, Hao-Ming Ku, Shih-I Chen, Tzu-Ling Yang, Ya-Wen Lin, Chuang-Sheng Lin, Yi-Chia Ho