Patents by Inventor Ching-Hao Yu
Ching-Hao Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11955634Abstract: A particle structure of cathode material and a preparation method thereof is provided. Firstly, a precursor for forming a core is provided. The precursor includes at least nickel, cobalt and manganese. Secondly, a metal salt and a lithium ion compound are provided. The metal salt includes at least potassium, aluminum and sulfur. After that, the metal salt, the lithium ion compound and the precursor are mixed, and a mixture is formed. Finally, the mixture is subjected to a heat treatment step, and a cathode material particle structure is formed to include the core, a first coating layer coated on the core and a second coating layer coated on the first coating layer. The core includes potassium, aluminum and a Li-M-O based material. The first coating layer includes potassium and aluminum, and a potassium content of the first coating layer is higher than a potassium content of the core. The second coating layer includes sulfur.Type: GrantFiled: November 18, 2021Date of Patent: April 9, 2024Assignee: ADVANCED LITHIUM ELECTROCHEMISTRY CO., LTD.Inventors: Ching-Hao Yu, Nae-Lih Wu, Chia-Hsin Lin
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Publication number: 20220415081Abstract: An image modification method and an image modification device are disclosed. The method includes the following. A first image is obtained. A first image region in the first image and a second image region within the first image region are detected by at least one image detector. The second image region includes an image region presenting a target color in the first image region. The first image region is covered with a replacement image and a second image is generated based on an area ratio of the second image region to the first image region being greater than a predetermined value.Type: ApplicationFiled: April 22, 2022Publication date: December 29, 2022Applicant: PEGATRON CORPORATIONInventors: Po-Sen Chen, Chia-Liang Chiang, Ching-Hao Yu, Tsai-Chien Kao, Cyuan-Yue Jhong, Tao-Hua Cheng
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Publication number: 20220255073Abstract: A particle structure of cathode material and a preparation method thereof is provided. Firstly, a precursor for forming a core is provided. The precursor includes at least nickel, cobalt and manganese. Secondly, a metal salt and a lithium ion compound are provided. The metal salt includes at least potassium, aluminum and sulfur. After that, the metal salt, the lithium ion compound and the precursor are mixed, and a mixture is formed. Finally, the mixture is subjected to a heat treatment step, and a cathode material particle structure is formed to include the core, a first coating layer coated on the core and a second coating layer coated on the first coating layer. The core includes potassium, aluminum and a Li—M—O based material. The first coating layer includes potassium and aluminum, and a potassium content of the first coating layer is higher than a potassium content of the core. The second coating layer includes sulfur.Type: ApplicationFiled: November 18, 2021Publication date: August 11, 2022Inventors: Ching-Hao Yu, Nae-Lih Wu, Chia-Hsin Lin
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Patent number: 11379714Abstract: An in-memory computing memory device is disclosed. The memory device comprises an array of memory cells, a plurality of word lines, a plurality of bit lines, (M+1) input circuits, a wordline driver and an evaluation circuitry. The array is divided into (M+1) lanes and each lane comprises P memory cell columns and an input circuit. The input circuit in each lane charges a predefined bit line with a default amount of charge proportional to an input synapse value and then distributes the default amount of charge to the other second bit lines with a predefined ratio based on a constant current. The evaluation circuitry couples a selected number of the bit lines to an accumulate line and convert an average voltage at the accumulate line into a digital value in response to a set of (M+1) input synapse values and the activated word line.Type: GrantFiled: May 29, 2019Date of Patent: July 5, 2022Assignee: BRITISH CAYMAN ISLANDS INTELLIGO TECHNOLOGY INC.Inventors: Chi-Wei Peng, Wei-Hsiang Tseng, Hong-Ching Chen, Shen-Jui Huang, Meng-Hsun Wen, Yu-Pao Tsai, Hsuan-Yi Hou, Ching-Hao Yu, Tsung-Liang Chen
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Publication number: 20200090030Abstract: An integrated circuit applied in a deep neural network is disclosed. The integrated circuit comprises at least one processor, a first internal memory, a second internal memory, at least one MAC circuit, a compressor and a decompressor. The processor performs a cuboid convolution over decompression data for each cuboid of an input image fed to any one of multiple convolution layers. The MAC circuit performs multiplication and accumulation operations associated with the cuboid convolution to output a convoluted cuboid. The compressor compresses the convoluted cuboid into one compressed segment and store it in the second internal memory. The decompressor decompresses data from the second internal memory segment by segment to store the decompression data in the first internal memory. The input image is horizontally divided into multiple cuboids with an overlap of at least one row for each channel between any two adjacent cuboids.Type: ApplicationFiled: September 17, 2019Publication date: March 19, 2020Inventors: Shen-Jui HUANG, Meng-Hsun WEN, Yu-Pao TSAI, Hsuan-Yi HOU, Ching-Hao YU, Wei-Hsiang TSENG, Chi-Wei PENG, Hong-Ching CHEN, Tsung-Liang CHEN
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Publication number: 20190370640Abstract: An in-memory computing memory device is disclosed. The memory device comprises an array of memory cells, a plurality of word lines, a plurality of bit lines, (M+1) input circuits, a wordline driver and an evaluation circuitry. The array is divided into (M+1) lanes and each lane comprises P memory cell columns and an input circuit. The input circuit in each lane charges a predefined bit line with a default amount of charge proportional to an input synapse value and then distributes the default amount of charge to the other second bit lines with a predefined ratio based on a constant current. The evaluation circuitry couples a selected number of the bit lines to an accumulate line and convert an average voltage at the accumulate line into a digital value in response to a set of (M+1) input synapse values and the activated word line.Type: ApplicationFiled: May 29, 2019Publication date: December 5, 2019Inventors: Chi-Wei PENG, Wei-Hsiang TSENG, Hong-Ching CHEN, Shen-Jui HUANG, Meng-Hsun WEN, Yu-Pao TSAI, Hsuan-Yi HOU, Ching-Hao YU, Tsung-Liang CHEN
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Patent number: 10281958Abstract: A portable electronic device includes a first body, a second body, a pivoting mechanism, a linking mechanism, and a first speaker unit. The pivoting mechanism is pivoted between the first body and the second body and includes a first rotating shaft, a second rotating shaft, and a third rotating shaft, and the third rotating shaft has a mounting portion. The linking mechanism includes a first rolling member and a second rolling member. The first rolling member is connected to the third rotating shaft of the pivoting mechanism, and the second rolling member is connected to the second rotating shaft of the pivoting mechanism. The first rolling member and the second rolling member roll relative to each other within an angle range. The first speaker unit is fixed to the mounting portion.Type: GrantFiled: August 24, 2018Date of Patent: May 7, 2019Assignee: PEGATRON CORPORATIONInventors: Chia-Liang Chiang, Yu-Ju Lin, Ching-Hao Yu, Hui-Hsiu Hsu, Yuan-Cyuan Wei, Chao-Wen Lai
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Publication number: 20190107867Abstract: A portable electronic device includes a first body, a second body, a pivoting mechanism, a linking mechanism, and a first speaker unit. The pivoting mechanism is pivoted between the first body and the second body and includes a first rotating shaft, a second rotating shaft, and a third rotating shaft, and the third rotating shaft has a mounting portion. The linking mechanism includes a first rolling member and a second rolling member. The first rolling member is connected to the third rotating shaft of the pivoting mechanism, and the second rolling member is connected to the second rotating shaft of the pivoting mechanism. The first rolling member and the second rolling member roll relative to each other within an angle range. The first speaker unit is fixed to the mounting portion.Type: ApplicationFiled: August 24, 2018Publication date: April 11, 2019Applicant: PEGATRON CORPORATIONInventors: Chia-Liang Chiang, Yu-Ju Lin, Ching-Hao Yu, Hui-Hsiu Hsu, Yuan-Cyuan Wei, Chao-Wen Lai
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Publication number: 20170046298Abstract: An asynchronous first-in first-out (AFIFO) buffer apparatus has an AFIFO buffer and a rate control circuit. The AFIFO buffer receives a data input from a first processing circuit operating under a first clock, and transmits a data output to a second processing circuit operating under a second clock, where the first clock is asynchronous to the second clock. The rate control circuit actively controls a data transfer rate of the data input regardless of a water level of the AFIFO buffer, and further adaptively applies compensation to the data transfer rate according to the water level of the AFIFO buffer.Type: ApplicationFiled: June 30, 2016Publication date: February 16, 2017Inventors: Ching-Hao Yu, Chi-Yung Wang, Hsuan-Hung Chen
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Publication number: 20150138709Abstract: A separable electronic device includes a display panel and a computer host. The display panel has a backside and a first connecting portion. The first connecting portion is provided at the backside. The computer host has a second connecting portion. The second connecting portion is detachably connected with the first connecting portion.Type: ApplicationFiled: January 21, 2014Publication date: May 21, 2015Applicant: PEGATRON CORPORATIONInventors: Hong-Yi CHEN, Chien-Chen LIN, Ching-Hao YU
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Patent number: 8526171Abstract: This disclosure provides a supporting structure module and an electronic device using the same. The supporting structure module in the invention is used in the electronic device. The electronic device includes a first casing, a hinge, and a second casing rotatable relative to the first casing via the hinge. The supporting structure module includes a first supporting structure, and the first supporting structure includes a first bracket and a first hinge cover. The first bracket is fixed to and exposed from the first casing. The first hinge cover is connected with the first bracket by integral forming, and the first hinge cover is exposed from the first casing and covers a part of the hinge.Type: GrantFiled: June 15, 2011Date of Patent: September 3, 2013Assignee: Pegatron CorporationInventors: Jiun-Lin Wu, Chia-Hsiang Hsiang, Ching-Hao Yu
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Patent number: 8510631Abstract: A multi-channel memory apparatus is provided. The multi-channel memory apparatus includes a host interface, storage channels, an error correcting module, and a multiple memory access module. The host interface is arranged to receive and transmit data from and to a host device. Each storage channel is coupled to a memory device for storing the data. The error correcting module is shared by the storage channels, includes an error correction code engine and a data buffer, and is arranged to perform error correction code encoding on the data to be stored into the memory devices and perform error correction code decoding on the data read out from the memory devices. The multiple memory access module is coupled between the storage channels and the error correcting module and arranged to perform multiple access control of the storage channels for the error correcting module.Type: GrantFiled: November 24, 2009Date of Patent: August 13, 2013Assignee: Mediatek Inc.Inventors: Chien-Chung Wu, Ching-Hao Yu, Li-Lien Lin, Chao-Yi Wu
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Publication number: 20110310541Abstract: This disclosure provides a supporting structure module and an electronic device using the same. The supporting structure module in the invention is used in the electronic device. The electronic device includes a first casing, a hinge, and a second casing rotatable relative to the first casing via the hinge. The supporting structure module includes a first supporting structure, and the first supporting structure includes a first bracket and a first hinge cover. The first bracket is fixed to and exposed from the first casing. The first hinge cover is connected with the first bracket by integral forming, and the first hinge cover is exposed from the first casing and covers a part of the hinge.Type: ApplicationFiled: June 15, 2011Publication date: December 22, 2011Inventors: Jiun-Lin Wu, Chia-Hsiang Hsiang, Ching-Hao Yu
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Patent number: 8072748Abstract: A portable electronic device includes a casing, a key, a loudspeaker, a soft insulating material, and an actuating unit. The key is disposed at the casing. The loudspeaker is embedded into the casing flatly. The soft insulating material covers the casing and the loudspeaker. The actuating unit is coupled to the key and the loudspeaker, and it actuates the loudspeaker to protrude from the casing in response to an actuation of the key.Type: GrantFiled: August 21, 2009Date of Patent: December 6, 2011Assignee: Pegatron CorporationInventors: Martijn Baller, Meng-Hsuan Shih, Chi-Chen Lin, Chien-Hsu Hou, Yen-Liang Chen, Chia-Ying Lee, Wei-Chun Chien, Yung-Chie Huang, Jia-Rong Lin, Ching-Hao Yu
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Publication number: 20110126079Abstract: A multi-channel memory apparatus is provided. The multi-channel memory apparatus includes a host interface, storage channels, an error correcting module, and a multiple memory access module. The host interface is arranged to receive and transmit data from and to a host device. Each storage channel is coupled to a memory device for storing the data. The error correcting module is shared by the storage channels, includes an error correction code engine and a data buffer, and is arranged to perform error correction code encoding on the data to be stored into the memory devices and perform error correction code decoding on the data read out from the memory devices. The multiple memory access module is coupled between the storage channels and the error correcting module and arranged to perform multiple access control of the storage channels for the error correcting module.Type: ApplicationFiled: November 24, 2009Publication date: May 26, 2011Applicant: MEDIATEK INC.Inventors: Chien-Chung Wu, Ching-Hao Yu, Li-Lien Lin, Chao-Yi Wu
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Publication number: 20100251076Abstract: An exemplary storage controller for controlling data access of a storage device includes a control circuit and a soft decoder. The control circuit is utilized for reading data from the storage device to obtain readout data. The soft decoder is coupled to the control circuit, and utilized for performing a soft decoding operation upon the readout data to generate decoded data. The soft decoder may be a low density parity check (LDPC) decoder, a block turbo code (BTC) decoder, or a convolutional turbo code (CTC) decoder. The storage device may be a flash memory device.Type: ApplicationFiled: December 23, 2009Publication date: September 30, 2010Inventors: Chao-Yi Wu, Li-Lien Lin, Chien-Chung Wu, Ching-Hao Yu
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Publication number: 20100067201Abstract: A flip electronic device includes a cover, a display module, a casing, a circuit board, and an electrical connection element. The casing is pivotally connected with the cover. The cover has a light-transparent portion. The display module is disposed at the cover. The circuit board is disposed in the casing. The electrical connection element is electrically connected with the display module and the circuit board. At least one portion of the electrical connection element is viewable through the light-transparent portion.Type: ApplicationFiled: September 11, 2009Publication date: March 18, 2010Inventors: Yen-Liang CHEN, Ching-Hao YU, Meng-Hsuan SHIH, Wei-Chun CHIEN, Chien-Hsu HOU, Martijn BALLER, Jia-Rong LIN, Yung-Chie HUANG, Chi-Chen LIN, Chia-Ying LEE
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Publication number: 20100063758Abstract: An electronic apparatus with a power indication function is connected to an adapter. The electronic apparatus includes a host, a power jack, a rechargeable battery, a power indication element and a controller. The power jack is disposed on the host for connecting with the adapter. The rechargeable battery is disposed in the host and is electrically connected to the power jack. The power indication element has a switch disposed adjacent to the power jack and a power indicator disposed in the host. The controller is electrically connected to the rechargeable battery, the switch and the power indicator. When the switch turns on, the controller detects the remained power in the rechargeable battery and the remained power is indicated by the power indicator.Type: ApplicationFiled: September 4, 2009Publication date: March 11, 2010Inventors: Ching-Hao Yu, Meng-Hsuan Shih, Wei-Chun Chien, Chien-Hsu Hou, Martijn Baller, Jia-Rong Lin, Chia-Ying Lee, Yen-Liang Chen, Yung-Chie Huang, Chi-Chen Lin
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Publication number: 20100051430Abstract: A button assembly is applied to a portable electronic device having a casing. The casing has an opening. The button assembly includes a button and a circuit board. The button is disposed at the opening and has a button body and a cloth-material layer. The cloth-material layer covers at least one portion of the button body and is exposed to a surface of the casing. The circuit board is disposed in the casing. The circuit board has a switch corresponding to the button body. A portable electronic device having the button assembly is also disclosed.Type: ApplicationFiled: August 26, 2009Publication date: March 4, 2010Inventors: Martijn BALLER, Chi-Chen Lin, Yen-Liang Chen, Jia-Rong Lin, Chien-Hsu Hou, Meng-Hsuan Shih, Chia-Ying Lee, Wei-Chun Chien, Ching-Hao Yu, Yung-Chie Huang
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Publication number: 20100046162Abstract: A casing includes a main body and a covering layer. The main body has a first transparent area and a second transparent area disposed as mirror images. Light passes through the first transparent area and the second transparent area. The covering layer covers the second transparent area and has a transmittance gradient. A method for manufacturing the casing and an electronic device having the casing are also disclosed.Type: ApplicationFiled: August 19, 2009Publication date: February 25, 2010Applicant: PEGATRON CORPORATIONInventors: Yen-Liang CHEN, Wei-Chun CHIEN, Ching-Hao YU, Chien-Hsu HOU, Martijn BALLER, Jia-Rong LIN, Ching-Ying LEE, Yung-Chie HUANG, Chi-Chen LIN, Meng-Hsuan SHIH