Patents by Inventor Ching Ho

Ching Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145379
    Abstract: Methods and semiconductor devices are provided. A method includes determining a location of a polyimide opening (PIO) corresponding to an under-bump metallization (UBM) feature in a die. The die includes a substrate and an interconnect structure over the substrate. The method also includes determining a location of a stacked via structure in the interconnect structure based on the location of the PIO. The method further includes forming, in the interconnect structure, the stacked via structure comprising at most three stacked contact vias at the location of the PIO.
    Type: Application
    Filed: February 23, 2023
    Publication date: May 2, 2024
    Inventors: Yen-Kun Lai, Wei-Hsiang Tu, Ching-Ho Cheng, Cheng-Nan Lin, Chiang-Jui Chu, Chien Hao Hsu, Kuo-Chin Chang, Mirng-Ji Lii
  • Patent number: 11973048
    Abstract: A semiconductor package includes a first die having a first surface, a first conductive bump over the first surface and having first height and a first width, a second conductive bump over the first surface and having a second height and a second width. The first width is greater than the second width and the first height is substantially identical to the second height. A method for manufacturing the semiconductor package is also provided.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: April 30, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: An-Nong Wen, Ching-Han Huang, Ching-Ho Chang
  • Publication number: 20240130014
    Abstract: A LED power supply with bi-level dimming receives an input voltage to supply power to an LED lamp, and adjusts the brightness of the LED lamp according to whether an external detection switch is triggered to be turned on. The LED power supply includes a conversion circuit, a switch, and an oscillation circuit. The conversion circuit converts the input voltage into an output voltage, and provides the output voltage to supply power to the LED lamp so as to control the LED lamp to provide a first brightness. The oscillation circuit provides a dimming signal with a fixed frequency and a duty cycle to the switch when the external detection switch is turned on so as to turn on and turn off the switch. The switch correspondingly adjusts the output voltage according to the dimming signal to control the LED lamp to provide a second brightness.
    Type: Application
    Filed: January 17, 2023
    Publication date: April 18, 2024
    Inventors: Ching-Ho CHOU, Yung-Chuan LU
  • Publication number: 20240128249
    Abstract: An electronic package is provided, in which a circuit structure is stacked on a carrier structure having a routing layer via support structures, where electronic elements are disposed on upper and lower sides of the circuit structure and the carrier structure, and the electronic elements and the support structures are encapsulated by a cladding layer, such that the electronic package can effectively increase the packaging density to meet the requirements of multi-functional end products.
    Type: Application
    Filed: December 8, 2022
    Publication date: April 18, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chih-Hsien CHIU, Wen-Jung TSAI, Chi-Ching HO
  • Publication number: 20240130013
    Abstract: A bi-level dimming LED power supply equipment adjusts the brightness of a plurality of LED lights according to whether an external detection switch is triggered turned on. The LED power supply equipment includes a plurality of LED power supplies, and the LED power supplies respectively include an input end and an output end. The input end receives an input voltage, and the output end includes a bus positive end, a bus negative end and a dimming end. The dimming end is commonly coupled to a first end of the external detection switch, and one of the bus positive end or the bus negative end is commonly coupled to a second end of the external detection switch and one end of the LED lights, and the other one of the bus positive end or the bus negative end is respectively coupled to the other ends of the LED lights.
    Type: Application
    Filed: January 10, 2023
    Publication date: April 18, 2024
    Inventors: Ching-Ho CHOU, Yung-Chuan LU
  • Publication number: 20240116068
    Abstract: Disclosed is an upside-down sprayer with an auxiliary air conducting device for liquid pumping, including a container, a nozzle, and a dip tube equipped with a switching valve near its upper end, which has a valve casing, a valve ball, and an inverted liquid pumping port. An auxiliary air conducting device is disposed adjacent to the switching valve and includes a connection part, a guide seat, and a projecting tube with an opening, wherein the connection part is positioned on the dip tube, the guide seat has a groove, and the projecting tube communicates with the groove. The opening of the projecting tube is offset in the direction of the inverted liquid pumping port, and the height of the opening is not lower than the height of the inverted liquid pumping port when used inverted.
    Type: Application
    Filed: August 14, 2023
    Publication date: April 11, 2024
    Inventors: Ching-Chung CHAN, Chun-Ho CHU
  • Patent number: 11949001
    Abstract: The present disclosure provides a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes channel members disposed over a substrate, a gate structure engaging the channel members, and an epitaxial feature adjacent the channel members. At least one of the channel members has an end portion in physical contact with an outer portion of the epitaxial feature. The end portion of the at least one of the channel members includes a first dopant of a first concentration. The outer portion of the epitaxial feature includes a second dopant of a second concentration. The first concentration is higher than the second concentration.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Ching Wang, Chung-I Yang, Jon-Hsu Ho, Wen-Hsing Hsieh, Kuan-Lun Cheng, Chung-Wei Wu, Zhiqiang Wu
  • Patent number: 11940060
    Abstract: The present invention provides a seal ring structure, which comprises a seal ring member. The seal ring member includes a first ring opening on one side and a second ring opening on the other. A periphery of the first ring opening includes a plurality of leak grooves. When the seal ring member and the valve ball squeeze each other, the plurality of leak grooves can reduce the torque required to rotate the valve ball. A leak-groove length of the plurality of leak grooves is smaller than a seal-ring-member length of the seal ring member. The plurality of leak grooves do not penetrate the seal ring member for avoiding leakage of fluid.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: March 26, 2024
    Assignee: METAL INDUSTRIES RESEARCH & DEVELOPMENT CENTRE
    Inventors: Ching-An Lin, Chin-Kang Chen, Chia-Ho Cheng
  • Patent number: 11940828
    Abstract: A voltage tracking circuit is provided. The voltage tracking circuit includes first and second P-type transistors and a control circuit. The drain of the first P-type transistor is coupled to a first voltage terminal. The gate and the drain of the second P-type transistor are respectively coupled to the first voltage terminal and a second voltage terminal. The control circuit is coupled to the first and second voltage terminals and generates a control voltage according to the first voltage and the second voltage. The sources of the first and second P-type transistors are coupled to an output terminal of the voltage tracking circuit, and the output voltage is generated at the output terminal. In response to the second voltage being higher than the first voltage, the control circuit generates the control signal to turn off the first P-type transistor.
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: March 26, 2024
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Shao-Chang Huang, Yeh-Ning Jou, Ching-Ho Li, Kai-Chieh Hsu, Chun-Chih Chen, Chien-Wei Wang, Gong-Kai Lin, Li-Fan Chen
  • Publication number: 20240082687
    Abstract: A skate includes a body including a toe having a projection on a first side and a cavity on an opposing second side; and a replaceable bar having a through hole on a first side and a protrusion on a second side; and a plurality of wheels rotatably mounted on an underside of the body. The projection is inserted through the through hole and the protrusion is inserted into the cavity, thereby assembling the replaceable bar and the toe.
    Type: Application
    Filed: October 9, 2023
    Publication date: March 14, 2024
    Inventor: Ching-Ho Yeh
  • Patent number: 11923337
    Abstract: A method of manufacturing a carrying substrate is provided. At least one circuit component is disposed on a first circuit structure. An encapsulation layer is formed on the first circuit structure and encapsulates the circuit component. A second circuit structure is formed on the encapsulation layer and electrically connected to the circuit component. The circuit component is embedded in the encapsulation layer via an existing packaging process. Therefore, the routing area is increased, and a package substrate requiring a large size has a high yield and low manufacturing cost.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: March 5, 2024
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chi-Ching Ho, Bo-Hao Ma, Yu-Ting Xue, Ching-Hung Tseng, Guan-Hua Lu, Hong-Da Chang
  • Publication number: 20240061455
    Abstract: A voltage tracking circuit is provided. The voltage tracking circuit includes first and second P-type transistors and a control circuit. The drain of the first P-type transistor is coupled to a first voltage terminal. The gate and the drain of the second P-type transistor are respectively coupled to the first voltage terminal and a second voltage terminal. The control circuit is coupled to the first and second voltage terminals and generates a control voltage according to the first voltage and the second voltage. The sources of the first and second P-type transistors are coupled to an output terminal of the voltage tracking circuit, and the output voltage is generated at the output terminal. In response to the second voltage being higher than the first voltage, the control circuit generates the control signal to turn off the first P-type transistor.
    Type: Application
    Filed: August 17, 2022
    Publication date: February 22, 2024
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang HUANG, Yeh-Ning JOU, Ching-Ho LI, Kai-Chieh HSU, Chun-Chih CHEN, Chien-Wei WANG, Gong-Kai LIN, Li-Fan CHEN
  • Publication number: 20240045314
    Abstract: A projection lens, a control method thereof, and a projection device are provided. The projection lens is adapted for the projection device, and includes a lens body including an aperture assembly and a lens element group; an aperture adjustment module disposed on the lens body, connected to the aperture assembly, and configured to adjust the aperture assembly; a lens element adjustment module disposed on the lens body, connected to the lens element group, and configured to adjust the lens element group; and a switching assembly coupled to the aperture adjustment module and the lens element adjustment module. The switching assembly is configured to switch to a first state, so that the lens element adjustment module adjusts the lens element group, and the switching assembly is configured to switch to a second state, so that the aperture adjustment module group adjusts the aperture assembly.
    Type: Application
    Filed: August 4, 2023
    Publication date: February 8, 2024
    Applicant: Coretronic Corporation
    Inventors: Pen-Ning Kuo, Wen-Ching Ho
  • Publication number: 20240038685
    Abstract: An electronic package is provided and includes an electronic structure and a plurality of conductive pillars embedded in a cladding layer, a circuit structure formed on the cladding layer, and a reinforcing member bonded to a side surface of the cladding layer, where a plurality of electronic elements are disposed on and electrically connected to the circuit structure, such that the electronic structure electrically bridges any two of the electronic elements via the circuit structure, so as to enhance the structural strength of the electronic package and avoid warpage by means of the design of the reinforcing member.
    Type: Application
    Filed: September 22, 2022
    Publication date: February 1, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chao-Chiang Pu, Chi-Ching Ho, Yi-Min Fu, Yu-Po Wang, Fang-Lin Tsai
  • Publication number: 20230418140
    Abstract: An infrared (IR) light source module for providing an IR light beam includes at least one circuit substrate, first IR light-emitting elements, and second IR light-emitting elements. The first IR light-emitting elements are disposed on the at least one circuit substrate. The first IR light-emitting elements are used to provide a first light beam. The second IR light-emitting elements are disposed on the at least one circuit substrate. The second IR light-emitting elements are used to provide a second light beam. The IR light beam includes at least one of a first light beam and a second light beam, wherein a wavelength of the first light beam is greater than or equal to 700 nm and less than or equal to 780 nm, and a wavelength of the second light beam is greater than 780 nm and less than or equal to 1000 nm.
    Type: Application
    Filed: June 19, 2023
    Publication date: December 28, 2023
    Applicant: Coretronic Corporation
    Inventors: Pen-Ning Kuo, Wen-Ching Ho
  • Publication number: 20230420420
    Abstract: A method of manufacturing a carrying substrate is provided. At least one circuit component is disposed on a first circuit structure. An encapsulation layer is formed on the first circuit structure and encapsulates the circuit component. A second circuit structure is formed on the encapsulation layer and electrically connected to the circuit component. The circuit component is embedded in the encapsulation layer via an existing packaging process. Therefore, the routing area is increased, and a package substrate requiring a large size has a high yield and low manufacturing cost.
    Type: Application
    Filed: September 11, 2023
    Publication date: December 28, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chi-Ching HO, Bo-Hao MA, Yu-Ting XUE, Ching-Hung TSENG, Guan-Hua LU, Hong-Da CHANG
  • Publication number: 20230413441
    Abstract: A circuit board assembly is provided and includes a first circuit board, a second circuit board and a first connecting module. The first connecting module includes a first connecting wire, a first connector and a second connector. The first circuit board includes a first processor, and the second circuit board includes a second processor. One end of the first connector is connected to one end of the first connecting wire, and the other end of the first connector is connected to the first circuit board. One end of the second connector is connected to the other end of the first connecting wire, and the other end of the second connector is connected to the second circuit board. The first connector is adjacent to the first processor, and the second connector is adjacent to the second processor.
    Type: Application
    Filed: August 25, 2023
    Publication date: December 21, 2023
    Inventors: CHING-HO HSIEH, MING-HSING WU, KUEI-SHENG WU
  • Patent number: D1007422
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: December 12, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chun-Hung Kuo, Po-Heng Chao, Jui-Ching Lee, Ching-Ho Chou
  • Patent number: D1007520
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: December 12, 2023
    Assignee: CHINA MEDICAL UNIVERSITY
    Inventors: Der-Yang Cho, Chih-Yu Chi, Chia-Huei Chou, Yow-Wen Hsieh, Pei-Ran Sun, Lu-Ching Ho, Ming-Tung Chen
  • Patent number: D1014681
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: February 13, 2024
    Inventor: Ching-Ho Yeh