Patents by Inventor Ching-Hong Tsai

Ching-Hong Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250064345
    Abstract: A gait evaluating system including a processor is provided. The processor identifies whether a gait type of the user belongs to a normal gait, a non-neuropathic gait or a neuropathic gait based on step feature values of a user and walking limb feature values of the user. In response to that the gait type of the user belongs to the non-neuropathic gait, the processor controls the display panel to display a first auxiliary information, a second auxiliary information, and a third auxiliary information. The first auxiliary information indicates a potential sarcopenia of the user. The second auxiliary information indicates a dietary guideline for muscle building and muscle strengthening. The third auxiliary information shows a motion instruction video for regaining or maintaining muscle strength of the user.
    Type: Application
    Filed: October 18, 2024
    Publication date: February 27, 2025
    Applicant: Industrial Technology Research Institute
    Inventors: Je-Ping Hu, Keng-Hsun Lin, Shih-Fang Yang Mao, Pin-Chou Li, Jian-Hong Wu, Szu-Ju Li, Hui-Yu Cho, Yu-Chang Chen, Yen-Nien Lu, Jyun-Siang Hsu, Nien-Ya Lee, Kuan-Ting Ho, Ming-Chieh Tsai, Ching-Yu Huang
  • Publication number: 20250072172
    Abstract: The present invention relates to a light-emitting diode (LED) which comprises multiple point-like transparent conductive electrodes, a dielectric layer, and an epitaxial composite layer. The dielectric layer is disposed around each point-like transparent conductive electrode. The epitaxial composite layer comprises a carbon-doped gallium arsenide epitaxial layer. The carbon-doped gallium arsenide epitaxial layer is disposed both on each point-like transparent conductive electrode and the dielectric layer and electrically connected to each point-like transparent conductive electrode.
    Type: Application
    Filed: December 4, 2023
    Publication date: February 27, 2025
    Inventors: Ching-Yuan TSAI, Yao-Hong HUANG, Hong-Ta CHENG
  • Patent number: 12204163
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: February 5, 2024
    Date of Patent: January 21, 2025
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Patent number: 5570375
    Abstract: An IEEE Std. 1149.1 boundary scan circuit which is capable of performing built-in self-testing includes a logic circuit, cascaded input boundary-scan cells that form an input boundary-scan register connected to input nodes of the logic circuit, cascaded output boundary-scan cells that form an output boundary-scan register connected to output nodes of the logic circuit, and a test access port system for controlling operation of the input and output boundary-scan cells. The test access port system provides a built-in self-test control signal to the input and output boundary-scan cells when executing built-in self-testing. The input boundary-scan register is reconfigurable to operate as a test pattern generator that provides test patterns to the logic circuit for a predetermined number of clock cycles upon receipt of the built-in self-test control signal.
    Type: Grant
    Filed: May 10, 1995
    Date of Patent: October 29, 1996
    Assignee: National Science Council of R.O.C.
    Inventors: Ching-Hong Tsai, Fang-Diahn Guo, Jin-Hua Hong, Cheng-Wen Wu