Abstract: A method includes calculating a processing tool offset for a processing tool, wherein the processing tool offset is a first portion of a process offset time attributable to a processing tool. The method further includes calculating a product offset, wherein the product tool offset is a second portion of the process offset time attributable to a product. The method further includes determining whether the product offset is stable based on a pre-determined tolerance and a number of processed wafers. The method further includes calculating an offset time for processing the product using the processing tool based on the calculated processing tool offset, without considering the product offset in response to a determination that the product offset is stable.

Abstract: A method includes, for a first tool-log variable of a set of tool-log variables, comparing a first tool-log variable result from a first integrated circuit (IC) manufacturing recipe to a first tool-log variable result from a second IC manufacturing recipe. The set of tool-log variables corresponds to one or more tool-logs generated from execution of the first IC manufacturing recipe and the second IC manufacturing recipe on an IC manufacturing tool. Based on the comparison, performing an operation of generating instructions to add one of the first IC manufacturing recipe or the second IC manufacturing recipe to an IC manufacturing recipe library, or performing an operation of generating a defense report for one of the first IC manufacturing recipe or the second IC manufacturing recipe.

Abstract: A method includes calculating a processing tool offset for a processing tool, wherein the processing tool offset is a first portion of a process offset time attributable to a processing tool. The method further includes calculating a product offset, wherein the product tool offset is a second portion of the process offset time attributable to a product. The method further includes determining whether the product offset is stable based on a pre-determined tolerance and a number of processed wafers. The method further includes calculating an offset time for processing the product using the processing tool based on the calculated processing tool offset, without considering the product offset in response to a determination that the product offset is stable.

Abstract: A method includes calculating a processing tool offset for a processing tool based on process control parameters, wherein the processing tool offset is a first portion of a process offset time attributable to a processing tool. The method further includes calculating a product offset based on the process control parameters, wherein the product tool offset is a second portion of the process offset time attributable to a product. The method further includes determining whether the product offset is stable based on a difference between a processing time for different products being within a pre-determined tolerance and a number of processed wafers exceeding a threshold amount. The method further includes calculating an offset time for processing the product using the processing tool based on the calculated processing tool offset, without considering the product offset in response to a determination that the product offset is stable.

Abstract: A method includes, for a first tool-log variable of a set of tool-log variables, comparing a first tool-log variable result from a first integrated circuit (IC) manufacturing recipe to a first tool-log variable result from a second IC manufacturing recipe. The set of tool-log variables corresponds to one or more tool-logs generated from execution of the first IC manufacturing recipe and the second IC manufacturing recipe on an IC manufacturing tool. Based on the comparison, performing an operation of generating instructions to add one of the first IC manufacturing recipe or the second IC manufacturing recipe to an IC manufacturing recipe library, or performing an operation of generating a defense report for one of the first IC manufacturing recipe or the second IC manufacturing recipe.

Abstract: A method includes, for a first tool-log variable of a set of tool-log variables, comparing a first tool-log variable result from a first integrated circuit (IC) manufacturing recipe to a first tool-log variable result from a second IC manufacturing recipe. The set of tool-log variables corresponds to one or more tool-logs generated from execution of the first IC manufacturing recipe and the second IC manufacturing recipe on an IC manufacturing tool. Based on the comparison, a first tool-log variable similarity value for the first tool-log variable is assigned, and, based on the first tool-log variable similarity value, a recipe similarity value for the first IC manufacturing recipe and the second IC manufacturing recipe is calculated. At least one of comparing the first tool-log variable results, assigning the first tool-log variable similarity value, or calculating the recipe similarity value is performed by a processing device.

Abstract: A method includes calculating a processing tool offset for a processing tool based on process control parameters, wherein the processing tool offset is a first portion of a process offset time attributable to a processing tool. The method further includes calculating a product offset based on the process control parameters, wherein the product tool offset is a second portion of the process offset time attributable to a product. The method further includes determining whether the product offset is stable based on a difference between a processing time for different products being within a pre-determined tolerance and a number of processed wafers exceeding a threshold amount. The method further includes calculating an offset time for processing the product using the processing tool based on the calculated processing tool offset, without considering the product offset in response to a determination that the product offset is stable.

Abstract: A method of making a semiconductor device includes collecting process control parameters during operation of a processing tool processing a product. The method further includes calculating a processing tool offset for the processing tool based on the collected process control parameters and calculating a product offset based on the collected process control parameters. The method further includes determining whether the product offset is stable and calculating an offset time for processing the product using the processing tool based on the calculated processing tool offset if the product offset is stable.

Abstract: A method includes, for a first tool-log variable of a set of tool-log variables, comparing a first tool-log variable result from a first integrated circuit (IC) manufacturing recipe to a first tool-log variable result from a second IC manufacturing recipe. The set of tool-log variables corresponds to one or more tool-logs generated from execution of the first IC manufacturing recipe and the second IC manufacturing recipe on an IC manufacturing tool. Based on the comparison, a first tool-log variable similarity value for the first tool-log variable is assigned, and, based on the first tool-log variable similarity value, a recipe similarity value for the first IC manufacturing recipe and the second IC manufacturing recipe is calculated. At least one of comparing the first tool-log variable results, assigning the first tool-log variable similarity value, or calculating the recipe similarity value is performed by a processing device.

Abstract: The present disclosure provides a method for determining an applicability of a specific processing device having a specific processing pattern. The method includes the following steps: locating a similarity index between the specific processing pattern and a reference processing pattern of a reference processing device; and confirming the applicability of the specific processing device if the similarity index is no less than a threshold. Besides, a method for assessing an applicability of a new processing pattern for a specific processing device, and a method for determining an applicability of an alternative processing path for a reference processing path are also provided.

Abstract: A method of making a semiconductor device includes collecting process control parameters during operation of a processing tool processing a product. The method further includes calculating a processing tool offset for the processing tool based on the collected process control parameters and calculating a product offset based on the collected process control parameters. The method further includes determining whether the product offset is stable and calculating an offset time for processing the product using the processing tool based on the calculated processing tool offset if the product offset is stable.

Abstract: The present disclosure provides a method for determining an applicability of a specific processing device having a specific processing pattern. The method includes the following steps: locating a similarity index between the specific processing pattern and a reference processing pattern of a reference processing device; and confirming the applicability of the specific processing device if the similarity index is no less than a threshold. Besides, a method for assessing an applicability of a new processing pattern for a specific processing device, and a method for determining an applicability of an alternative processing path for a reference processing path are also provided.