Patents by Inventor Ching-Hsiang Cheng

Ching-Hsiang Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060075818
    Abstract: The embodiments of the present invention provide a CMUT array and method of fabricating the same. The CMUT array has CMUT elements individually or respectively addressable from a backside of a substrate on which the CMUT array is fabricated. In one embodiment, a CMUT array is formed on a front side of a very high conductivity silicon substrate. Through wafer trenches are etched into the substrate from the backside of the substrate to electrically isolate individual CMUT elements formed on the front side of the substrate. Electrodes are formed on the backside of the substrate to individually address the CMUT elements through the substrate.
    Type: Application
    Filed: June 4, 2005
    Publication date: April 13, 2006
    Inventors: Yongli Huang, Xuefeng Zhuang, Butrus Khuri-Yakub, Ching-Hsiang Cheng, Arif Ergun
  • Patent number: 6836020
    Abstract: A wafer with through wafer interconnects. The wafer includes spaced through wafer vias which extend between the back side and front side of the wafer. A conductor within each of said vias connects to front and back side pads. Functions associated with said conductor and said pads provide a depletion region in the wafer between the pads and wafer or pads and conductor and the wafer.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: December 28, 2004
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Ching-Hsiang Cheng, Arif S. Ergun, Butrus T. Khuri-Yakub
  • Publication number: 20040141421
    Abstract: A wafer with through wafer interconnects. The wafer includes spaced through wafer vias which extend between the back side and front side of the wafer. A conductor within each of said vias connects to front and back side pads. Functions associated with said conductor and said pads provide a depletion region in the wafer between the pads and wafer or pads and conductor and the wafer.
    Type: Application
    Filed: January 22, 2003
    Publication date: July 22, 2004
    Inventors: Ching-Hsiang Cheng, Arif S. Ergun, Butrus T. Khuri-Yakub