Patents by Inventor Ching-Hsien Huang

Ching-Hsien Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240140782
    Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: PO CHEN YEH, YI-HSIEN CHANG, FU-CHUN HUANG, CHING-HUI LIN, CHIAHUNG LIU, SHIH-FEN HUANG, CHUN-REN CHENG
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Patent number: 10692788
    Abstract: A conductive-insulator-semiconductor (CIS) device with low flicker noise is provided. In some embodiments, the CIS device comprises a semiconductor substrate, a pair of source/drain regions, a selectively-conductive channel, and a gate electrode. The pair of source/drain regions is in the semiconductor substrate, and the source/drain regions are laterally spaced. The selectively-conductive channel is in the semiconductor substrate, and extends laterally in a first direction, from one of the source/drain regions to another one of the source/drain regions. The gate electrode comprises a pair of peripheral segments and a central segment. The peripheral segments extend laterally in parallel in the first direction. The central segment covers the selectively-conductive channel and extends laterally in a second direction transverse to the first direction, from one of the peripheral segments to another one of the peripheral segments. A method for manufacturing the CIS device is also provided.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: June 23, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Shun Lo, Ching-Hsien Huang, Yu-Chi Chang
  • Publication number: 20190067138
    Abstract: A conductive-insulator-semiconductor (CIS) device with low flicker noise is provided. In some embodiments, the CIS device comprises a semiconductor substrate, a pair of source/drain regions, a selectively-conductive channel, and a gate electrode. The pair of source/drain regions is in the semiconductor substrate, and the source/drain regions are laterally spaced. The selectively-conductive channel is in the semiconductor substrate, and extends laterally in a first direction, from one of the source/drain regions to another one of the source/drain regions. The gate electrode comprises a pair of peripheral segments and a central segment. The peripheral segments extend laterally in parallel in the first direction. The central segment covers the selectively-conductive channel and extends laterally in a second direction transverse to the first direction, from one of the peripheral segments to another one of the peripheral segments. A method for manufacturing the CIS device is also provided.
    Type: Application
    Filed: August 28, 2017
    Publication date: February 28, 2019
    Inventors: Wen-Shun Lo, Ching-Hsien Huang, Yu-Chi Chang
  • Publication number: 20070158516
    Abstract: A liquid crystal display (LCD) is disclosed. The LCD includes: a screen; a pivot seat mounted at the rear surface of the screen; a connection rod; a first hinge chain positioned at the pivot seat and the top end of the connection rod so as to adjust the observation angle of the screen; a seat body; a pivotal section mounted onto the seat body; and a second hinge chain positioned at the pivot seat and the other top end of the connection rod so as to adjust the height of the screen.
    Type: Application
    Filed: April 25, 2003
    Publication date: July 12, 2007
    Inventor: Ching-Hsien Huang
  • Publication number: 20070090409
    Abstract: The present invention relates to a semiconductor device comprising at least one gate located in each of a memory array area and a periphery circuit area of a substrate, respectively, wherein the pattern density in the memory array area is higher than that in the periphery circuit area. The semiconductor device also comprises a barrier layer, which is located in the memory array area and the periphery circuit area, an undoped oxide barrier, which is located on the barrier layer in the periphery circuit area, and a boron-containing silicate glass, which is located on the barrier layer in the memory array area and on the undoped oxide barrier in the periphery circuit area.
    Type: Application
    Filed: October 26, 2005
    Publication date: April 26, 2007
    Inventors: Chia-Shun Hsiao, Ming-Sheng Tung, Hong-Ming Chen, Ching-Hsien Huang
  • Publication number: 20070093014
    Abstract: The present invention provides a method for preventing doped boron in a dielectric layer from diffusing into a substrate. First, at least one gate is formed on a periphery circuit area and a memory array area of a substrate, respectively, wherein the pattern density in the memory array area is higher than that in the periphery circuit area. Then, a barrier layer is formed on the memory array area and the periphery circuit area, and an undoped oxide barrier is formed on the periphery circuit area. Finally, a silicate glass containing boron is deposited on the memory array area and the periphery circuit area.
    Type: Application
    Filed: October 26, 2005
    Publication date: April 26, 2007
    Inventors: Chia-Shun Hsiao, Ming-Sheng Tung, Hong-Ming Chen, Ching-Hsien Huang
  • Publication number: 20060119759
    Abstract: A liquid crystal display includes a display, multiple signal and power connectors; a hinge on the back of the display; a base provided with a combination part connected to the hinge; an opening facing a gap on the front of the display being provided below the combination part; the depth of the gap not less than the distance between the hinge to the bottom of the display for swiveling the display to indicate horizontal status to allow easy visibility of those connectors to facilitate their connection.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 8, 2006
    Inventor: Ching-Hsien Huang
  • Publication number: 20060120034
    Abstract: An LCD structure with excellent heat dissipation efficiency is disclosed. The LCD structure has a display body comprising a front cover framed onto the front side of the display body; a rear cover framed onto the rear side of the display body, and the rear cover is mounted to the front cover to form a cavity to hold circuit board and electronic components, and the rear side surface of the rear cover has a through hole in communication with the cavity; and a rear panel, wherein a plurality of protruded pillars are formed between the edge of one side face of the rear panel and the through hole surrounding on the rear cover, the protruded pillar provide a distance for the rear panel to be mounted beyond the through hole of the rear cover so that a plurality of sideway dissipation holes are formed in between individual protruded pillars to the cavity.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 8, 2006
    Inventor: Ching-Hsien Huang
  • Patent number: D515091
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: February 14, 2006
    Assignee: AmTran Technologies Ltd.
    Inventor: Ching-Hsien Huang
  • Patent number: D490810
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: June 1, 2004
    Inventor: Ching-Hsien Huang