Patents by Inventor Ching-Hsing Hsieh
Ching-Hsing Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11151724Abstract: An automatic detecting method and an automatic detecting apparatus using the same are provided. The automatic detecting apparatus includes an inputting unit, a dividing unit, a contouring unit, a range analyzing unit, a boundary analyzing unit, an edge detecting unit, an expanding unit and an overlapping unit. The dividing unit is used for dividing an overlooking image into four clusters via a clustering algorithm. The contouring unit is used for obtaining a contour. The range analyzing unit is used for obtaining a detecting range. The boundary analyzing unit is used for obtaining a circular boundary in the detecting range. The edge detecting unit is used for obtaining a plurality of edges in the circular boundary. The expanding unit is used for expanding the edges to obtain a plurality of expanded edges. The overlapping unit is used for overlapping the expanded edges and the contour to obtain a defect pattern.Type: GrantFiled: June 3, 2019Date of Patent: October 19, 2021Assignee: UNITED MICROELECTRONICS CORP.Inventors: Tzu-Ping Kao, Ching-Hsing Hsieh, Chia-Chi Chang, Ju-Te Chen, Chen-Hui Huang, Cheng-Hsien Chen
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Patent number: 10935969Abstract: A virtual metrology system at least includes a process apparatus including a set of process data, the process apparatus producing a workpiece according to the set of process data. A virtual metrology server is configured to gather the set of process data, cluster the set of process data to obtain data clusters, and compare the data clusters with patterns. If the data clusters meet the patterns corresponding to the data clusters, performing a corresponding maintenance, repair, and overhaul step on the process apparatus.Type: GrantFiled: February 25, 2019Date of Patent: March 2, 2021Assignee: UNITED MICROELECTRONICS CORP.Inventors: Feng-Chi Chung, Ching-Hsing Hsieh, Yi-Chun Lin, Chien-Chuan Yu
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Publication number: 20200380693Abstract: An automatic detecting method and an automatic detecting apparatus using the same are provided. The automatic detecting apparatus includes an inputting unit, a dividing unit, a contouring unit, a range analyzing unit, a boundary analyzing unit, an edge detecting unit, an expanding unit and an overlapping unit. The dividing unit is used for dividing an overlooking image into four clusters via a clustering algorithm. The contouring unit is used for obtaining a contour. The range analyzing unit is used for obtaining a detecting range. The boundary analyzing unit is used for obtaining a circular boundary in the detecting range. The edge detecting unit is used for obtaining a plurality of edges in the circular boundary. The expanding unit is used for expanding the edges to obtain a plurality of expanded edges. The overlapping unit is used for overlapping the expanded edges and the contour to obtain a defect pattern.Type: ApplicationFiled: June 3, 2019Publication date: December 3, 2020Inventors: Tzu-Ping KAO, Ching-Hsing HSIEH, Chia-Chi CHANG, Ju-Te CHEN, Chen-Hui HUANG, Cheng-Hsien CHEN
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Patent number: 10606253Abstract: A method of monitoring a processing system for processing a substrate is provided. The method includes the following steps: acquiring data from the processing system for a plurality of parameters, the data including a plurality of data values; grouping the parameters into a plurality of sub-groups, each of the sub-groups including a plurality of correlated parameters; constructing a principle components analysis (PCA) model from the data values for the correlated parameters in a first one of the sub-groups, including normalizing the data values in the first one of the sub-groups with a first weighting factor and a second weighting factor, wherein the first weighting factor is different from the second weighting factor; and determining a statistical quantity using the PCA model.Type: GrantFiled: February 8, 2017Date of Patent: March 31, 2020Assignee: UNITED MICROELECTRONICS CORP.Inventors: Lian-Hua Shih, Chia-Chi Chang, Li-Ting Lin, Ching-Hsing Hsieh, Feng-Chi Chung, Meng-Chih Chang, Ming-Tung Wang, Chiu-Ping Chang, Yung-Yu Yang
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Publication number: 20190187674Abstract: A virtual metrology system at least includes a process apparatus including a set of process data, the process apparatus producing a workpiece according to the set of process data. A virtual metrology server is configured to gather the set of process data, cluster the set of process data to obtain data clusters, and compare the data clusters with patterns. If the data clusters meet the patterns corresponding to the data clusters, performing a corresponding maintenance, repair, and overhaul step on the process apparatus.Type: ApplicationFiled: February 25, 2019Publication date: June 20, 2019Applicant: United Microelectronics Corp.Inventors: Feng-Chi Chung, Ching-Hsing Hsieh, Yi-Chun Lin, Chien-Chuan Yu
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Patent number: 10261504Abstract: A virtual metrology system and a method therefor are provided herein. In the system, a set of process data is gathered and clustered according to a plurality of predetermined patterns. The clustered set of process data is calculated according to the corresponding pattern, so as to obtain a comparison result. If the obtained result meets a desired output, a corresponding step is performed based on the result. In one case, the corresponding step is a normal sampling step if the clustered set of process data meets the corresponding pattern. If the clustered set of process data does not meet the corresponding pattern, an alarm is generated thereby, and the corresponding equipment may be shut down. In another case, the corresponding step is a maintenance, repair, and overhaul step if the clustered set of process data meets the corresponding pattern.Type: GrantFiled: September 12, 2014Date of Patent: April 16, 2019Assignee: United Microelectronics Corp.Inventors: Feng-Chi Chung, Ching-Hsing Hsieh, Yi-Chun Lin, Chien-Chuan Yu
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Publication number: 20180224817Abstract: A method of monitoring a processing system for processing a substrate is provided. The method includes the following steps: acquiring data from the processing system for a plurality of parameters, the data including a plurality of data values; grouping the parameters into a plurality of sub-groups, each of the sub-groups including a plurality of correlated parameters; constructing a principle components analysis (PCA) model from the data values for the correlated parameters in a first one of the sub-groups, including normalizing the data values in the first one of the sub-groups with a first weighting factor and a second weighting factor, wherein the first weighting factor is different from the second weighting factor; and determining a statistical quantity using the PCA model.Type: ApplicationFiled: February 8, 2017Publication date: August 9, 2018Inventors: Lian-Hua Shih, Chia-Chi Chang, Li-Ting Lin, Ching-Hsing Hsieh, Feng-Chi Chung, Meng-Chih Chang, Ming-Tung Wang, Chiu-Ping Chang, Yung-Yu Yang
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Publication number: 20160274570Abstract: A method of virtual metrology is disclosed. Process data and measurement values corresponding to a workpiece are collected. The process data and the measurement values are used to establish a conjecture model. A theoretical model corresponding to the workpiece and the conjecture model is used to establish another conjecture model. The another conjecture model is used to establish a virtual metrology value. The virtual metrology value is used to predict properties of a subsequently manufactured workpiece.Type: ApplicationFiled: March 18, 2015Publication date: September 22, 2016Inventors: Lian-Hua Shih, Ching-Hsing Hsieh, Feng-Chi Chung, Chia-Chi Chang, Yu-Cheng Lin, Sian-Jhu Tsai, Meng-Chih Chang, Yi-Hui Tseng
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Publication number: 20160041548Abstract: A virtual metrology system and a method therefor are provided herein. In the system, a set of process data is gathered and clustered according to a plurality of predetermined patterns. The clustered set of process data is calculated according to the corresponding pattern, so as to obtain a comparison result. If the obtained result meets a desired output, a corresponding step is performed based on the result. In one case, the corresponding step is a normal sampling step if the clustered set of process data meets the corresponding pattern. If the clustered set of process data does not meet the corresponding pattern, an alarm is generated thereby, and the corresponding equipment may be shut down. In another case, the corresponding step is a maintenance, repair, and overhaul step if the clustered set of process data meets the corresponding pattern.Type: ApplicationFiled: September 12, 2014Publication date: February 11, 2016Inventors: Feng-Chi Chung, Ching-Hsing Hsieh, Yi-Chun Lin, Chien-Chuan Yu
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Publication number: 20160031056Abstract: A method of a fault detection and classification (FDC) may be used to determine outlier tools from a plurality of tools. The method includes generating a plurality of parameter charts, generating a plurality of group charts according to the plurality of parameter charts, generating a score table according to the plurality of group charts, determining outlier tools according to the score table, and performing tool correction on the outlier tools.Type: ApplicationFiled: August 4, 2014Publication date: February 4, 2016Inventors: Feng-Chi Chung, Ching-Hsing Hsieh, Chen-Hui Huang, Hsin-Kun Chu
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Patent number: 7602003Abstract: A semiconductor device structure is described, including a MOS transistor, a silicon-rich silicon nitride layer having a refractive index of about 2.00-2.30, and a dielectric layer. The silicon-rich silicon nitride layer is disposed between the MOS transistor and the dielectric layer, and covers the source/drain region, the spacer and the gate conductor of the MOS transistor.Type: GrantFiled: April 27, 2005Date of Patent: October 13, 2009Assignee: United Microelectronics Corp.Inventors: Min-Hsian Chen, Ching-Hsing Hsieh
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Patent number: 7579250Abstract: A semiconductor device structure is described, including a MOS transistor, a silicon-rich silicon nitride layer having a refractive index of about 2.00-2.30, and a dielectric layer. The silicon-rich silicon nitride layer is disposed between the MOS transistor and the dielectric layer, and covers the source/drain region, the spacer and the gate conductor of the MOS transistor.Type: GrantFiled: July 30, 2007Date of Patent: August 25, 2009Assignee: United Microelectronics Corp.Inventors: Min-Hsian Chen, Ching-Hsing Hsieh
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Publication number: 20080038937Abstract: A semiconductor device structure is described, including a MOS transistor, a silicon-rich silicon nitride layer having a refractive index of about 2.00-2.30, and a dielectric layer. The silicon-rich silicon nitride layer is disposed between the MOS transistor and the dielectric layer, and covers the source/drain region, the spacer and the gate conductor of the MOS transistor.Type: ApplicationFiled: July 30, 2007Publication date: February 14, 2008Applicant: UNITED MICROELECTRONICS CORP.Inventors: Min-Hsian Chen, Ching-Hsing Hsieh
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Patent number: 7285491Abstract: A salicide process is provided. A metal layer selected from a group consisting of nickel and an alloy thereof is formed on a silicon layer, the first step of the second thermal process is performed at 300˜400 degrees centigrade for 10˜60 seconds and the second step of the second thermal process is performed at 450˜550 degrees centigrade for 10˜60 seconds.Type: GrantFiled: October 27, 2006Date of Patent: October 23, 2007Assignee: United Microelectronics Corp.Inventors: Min-Hsian Chen, Ching-Hsing Hsieh
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Patent number: 7238611Abstract: A salicide process is provided. A metal layer selected from a group consisting of titanium, cobalt, platinum, palladium and an alloy thereof is formed over a silicon layer. A first thermal process is performed. Next, a second thermal process is performed, wherein the second thermal process includes a first step performed at 600˜700 degrees centigrade for 10˜60 seconds and a second step performed at 750˜850 degrees centigrade for 10˜60 seconds. If the metal layer is selected from a group consisting of nickel and an alloy thereof is formed on a silicon layer, the first step of the second thermal process is performed at 300˜400 degrees centigrade for 10˜60 seconds and the second step of the second thermal process is performed at 450˜550 degrees centigrade for 10˜60 seconds.Type: GrantFiled: April 13, 2005Date of Patent: July 3, 2007Assignee: United Microelectronics Corp.Inventors: Min-Hsian Chen, Ching-Hsing Hsieh
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Publication number: 20070048986Abstract: A salicide process is provided. A metal layer selected from a group consisting of nickel and an alloy thereof is formed on a silicon layer, the first step of the second thermal process is performed at 300˜400 degrees centigrade for 10˜60 seconds and the second step of the second thermal process is performed at 450˜550 degrees centigrade for 10˜60 seconds.Type: ApplicationFiled: October 27, 2006Publication date: March 1, 2007Applicant: United Microelectronics Corp.Inventors: Min-Hsian Chen, Ching-Hsing Hsieh
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Publication number: 20060246715Abstract: A semiconductor device structure is described, including a MOS transistor, a silicon-rich silicon nitride layer having a refractive index of about 2.00-2.30, and a dielectric layer. The silicon-rich silicon nitride layer is disposed between the MOS transistor and the dielectric layer, and covers the source/drain region, the spacer and the gate conductor of the MOS transistor.Type: ApplicationFiled: April 27, 2005Publication date: November 2, 2006Inventors: Min-Hsian Chen, Ching-Hsing Hsieh
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Publication number: 20060234485Abstract: A salicide process is provided. A metal layer selected from a group consisting of titanium, cobalt, platinum, palladium and an alloy thereof is formed over a silicon layer. A first thermal process is performed. Next, a second thermal process is performed, wherein the second thermal process includes a first step performed at 600˜700 degrees centigrade for 10˜60 seconds and a second step performed at 750˜850 degrees centigrade for 10˜60 seconds. If the metal layer is selected from a group consisting of nickel and an alloy thereof is formed on a silicon layer, the first step of the second thermal process is performed at 300˜400 degrees centigrade for 10˜60 seconds and the second step of the second thermal process is performed at 450˜550 degrees centigrade for 10˜60 seconds.Type: ApplicationFiled: April 13, 2005Publication date: October 19, 2006Inventors: Min-Hsian Chen, Ching-Hsing Hsieh
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Patent number: 6265298Abstract: An improved method for forming inter-metal dielectrics (IMD) over a semiconductor substrate is provided, wherein a conductive line is formed thereon. A first dielectric layer is formed over the conductive line. A second dielectric layer is formed on the first dielectric layer by a spin-on glass method. A curing treatment with an electron beam having a low energy and a high dosage is performed to cure an upper portion of the second dielectric layer so that a cured third dielectric layer is formed on the second dielectric layer. A fourth dielectric layer is formed on the cured third dielectric layer. A chemical-mechanical polishing process is performed using the cured dielectric layer as a stop layer. A cap layer is formed on the fourth dielectric layer.Type: GrantFiled: February 16, 1999Date of Patent: July 24, 2001Assignee: United Microelectronics Corp.Inventors: Shuenn-Jeng Chen, Ching-Hsing Hsieh, Chih-Ching Hsu
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Patent number: 6211097Abstract: This invention provides a planarization method that solves the microscratch problem caused by chemical-mechanical polishing. This method comprises the following steps: providing a substrate with semiconductor devices, forming a SRO oxide on the substrate, forming a SOG layer on the SRO layer, performing a curing process, performing an implantation process during the curing process, forming an oxide layer on the SRO oxide, and planarizing the oxide layer by CMP. Another SOG layer is formed on the planarized oxide layer, a curing process is performed on the second SOG layer, and a cap oxide layer is formed on the second SOG layer to adjust the thickness of the dielectric layer. This invention can solve conventional problems such as microscratching and metal bridges.Type: GrantFiled: December 30, 1998Date of Patent: April 3, 2001Assignee: United Microelectronics Corp.Inventors: Shuenn-Jeng Chen, Ching-Hsing Hsieh