Patents by Inventor Ching-Hua Hsiao

Ching-Hua Hsiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120124272
    Abstract: A flash memory apparatus including a command analysis unit, a first flash memory and a second flash memory is provided. The command analysis unit with a plurality of command buffers receives a plurality of command elements and queues the command elements in the command buffers in sequence. The command analysis unit transmits the command elements simultaneously to the first flash memory and the second flash memory through a command bus, and the flash memory device writes/reads the first flash memory and the second flash memory simultaneously through a first data bus and a second data bus different from the first data bus respectively to execute an operation. The flash memory device queues the command elements so as to enhance the command throughput, and the flash memories share the same command bus for dual channel operation.
    Type: Application
    Filed: November 12, 2010
    Publication date: May 17, 2012
    Applicant: eMEMORY TECHNOLOGY INC.
    Inventors: Ching-Hua Hsiao, Jean-Yi Lee, Tsung-Hsien Lee, Sheng-An Yang
  • Publication number: 20030028735
    Abstract: The present invention provides a priority encoder comprising a first, second and third resolving-encoding circuit, each of which has a plurality of input terminals receiving a plurality of requests, determines one of the input terminals receiving one of the requests as a prior terminal, and outputs a forward request and an address of the prior terminal, wherein the forward requests of the first and second resolving-encoding circuit are received as the requests of the third resolving-encoding circuit, and a multiplexer receiving the addresses output from the first and second resolving-encoding circuit, and selectively outputting one of the received addresses according to the prior terminal determined by the third resolving-encoding circuit.
    Type: Application
    Filed: April 8, 2002
    Publication date: February 6, 2003
    Inventor: Ching-Hua Hsiao
  • Patent number: 6275435
    Abstract: A sense amplifier (SA) stage includes a single SA used to selectively sense signals from both directions in a datapath. The SA is connected to detect the differential signal present at a pair of sense nodes on the datapath. A first pair of switches is inserted in the datapath between the sense nodes and a first transfer port (FTP). A first equalizer is connected to the differential lines at points between the first pair of switches and the FTP. A second pair of switches is inserted in the datapath between the sense nodes and a second transfer port (STP), with a second equalizer connected to the differential lines between the second pair of switches and the STP. Before transferring data from the FTP to the STP, the first equalizer is turned on while the first pair of switches is turned off. While the data is being developed at the FTP, the first equalizer is turned off, the first pair of switches is turned on, the second pair of switches is off, and the second equalizer is on.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: August 14, 2001
    Assignee: Vanguard International Semiconductor Corp.
    Inventors: Jason Su, Ching-Hua Hsiao, Lidon Chen, Howard C. Kirsh