Patents by Inventor Ching-Hua Lin

Ching-Hua Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961791
    Abstract: A device includes a redistribution line, and a polymer region molded over the redistribution line. The polymer region includes a first flat top surface. A conductive region is disposed in the polymer region and electrically coupled to the redistribution line. The conductive region includes a second flat top surface not higher than the first flat top surface.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Wen Hsiao, Ming-Da Cheng, Chih-Wei Lin, Chen-Shien Chen, Chih-Hua Chen, Chen-Cheng Kuo
  • Patent number: 11955460
    Abstract: In accordance with some embodiments, a package-on-package (PoP) structure includes a first semiconductor package having a first side and a second side opposing the first side, a second semiconductor package having a first side and a second side opposing the first side, and a plurality of inter-package connector coupled between the first side of the first semiconductor package and the first side of the second semiconductor package. The PoP structure further includes a first molding material on the second side of the first semiconductor package. The second side of the second semiconductor package is substantially free of the first molding material.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Da Tsai, Meng-Tse Chen, Sheng-Feng Weng, Sheng-Hsiang Chiu, Wei-Hung Lin, Ming-Da Cheng, Ching-Hua Hsieh, Chung-Shi Liu
  • Publication number: 20240113071
    Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 4, 2024
    Inventors: Chung-Shi Liu, Mao-Yen Chang, Yu-Chia Lai, Kuo-Lung Pan, Hao-Yi Tsai, Ching-Hua Hsieh, Hsiu-Jen Lin, Po-Yuan Teng, Cheng-Chieh Wu, Jen-Chun Liao
  • Patent number: 11950424
    Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a first gate electrode disposed on the substrate and located in a first region of the semiconductor device. The semiconductor device also includes a first sidewall structure covering the first gate electrode. The semiconductor device further includes a protective layer disposed between the first gate electrode and the first sidewall structure. In addition, the semiconductor device includes a second gate electrode disposed on the substrate and located in a second region of the semiconductor device. The semiconductor device also includes a second sidewall structure covering a lateral surface of the second gate electrode.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Ting Tsai, Ching-Tzer Weng, Tsung-Hua Yang, Kao-Chao Lin, Chi-Wei Ho, Chia-Ta Hsieh
  • Publication number: 20240107682
    Abstract: An embodiment composite material for semiconductor package mount applications may include a first component including a tin-silver-copper alloy and a second component including a tin-bismuth alloy or a tin-indium alloy. The composite material may form a reflowed bonding material having a room temperature tensile strength in a range from 80 MPa to 100 MPa when subjected to a reflow process. The reflowed bonding material may include a weight fraction of bismuth that is in a range from approximately 4% to approximately 15%. The reflowed bonding material may an alloy that is solid solution strengthened by a presence of bismuth or indium that is dissolved within the reflowed bonding material or a solid solution phase that includes a minor component of bismuth dissolved within a major component of tin. In some embodiments, the reflowed bonding material may include intermetallic compounds formed as precipitates such as Ag3Sn and/or Cu6Sn5.
    Type: Application
    Filed: April 21, 2023
    Publication date: March 28, 2024
    Inventors: Chao-Wei Chiu, Chih-Chiang Tsao, Jen-Jui Yu, Hsuan-Ting Kuo, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Publication number: 20240105642
    Abstract: A method of manufacturing a package structure at least includes the following steps. An encapsulant laterally is formed to encapsulate the die and the plurality of through vias. A plurality of first connectors are formed to electrically connect to first surfaces of the plurality of through vias. A warpage control material is formed over the die, wherein the warpage control material is disposed to cover an entire surface of the die. A protection material is formed over the encapsulant and around the plurality of first connectors and the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 28, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Ching-Hua Hsieh, Hsiu-Jen Lin, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Jen-Jui Yu, Cheng-Shiuan Wong
  • Patent number: 11942451
    Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mao-Yen Chang, Yu-Chia Lai, Cheng-Shiuan Wong, Ting Hao Kuo, Ching-Hua Hsieh, Hao-Yi Tsai, Kuo-Lung Pan, Hsiu-Jen Lin
  • Patent number: 11942464
    Abstract: In an embodiment, a method includes: aligning a first package component with a second package component, the first package component having a first region and a second region, the first region including a first conductive connector, the second region including a second conductive connector; performing a first laser shot on a first portion of a top surface of the first package component, the first laser shot reflowing the first conductive connector of the first region, the first portion of the top surface of the first package component completely overlapping the first region; and after performing the first laser shot, performing a second laser shot on a second portion of the top surface of the first package component, the second laser shot reflowing the second conductive connector of the second region, the second portion of the top surface of the first package component completely overlapping the second region.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Hsiu-Jen Lin, Wei-Yu Chen, Philip Yu-Shuan Chung, Chia-Shen Cheng, Kuei-Wei Huang, Ching-Hua Hsieh, Chung-Shi Liu, Chen-Hua Yu
  • Publication number: 20240092415
    Abstract: An HOD device, comprising: a framework; covering material, covering the frame work; at least one conductive region, provided on or in the covering material; wherein the conductive region is coupled to a capacitance detection circuit or a predetermined voltage level. The HOD device can be a vehicle control device such as a steering wheel. The conductive region comprises conductive wires which can be threads of the covering material. By this way, the arrangements of the conductive wires can be changed corresponding to the size or the shape of the frame work or any other requirements. Also, the interference caused by unstable factors can be improved since the conductive wires can be coupled to a ground source of the vehicle to provide a short capacitance sensing path.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 21, 2024
    Applicant: PixArt Imaging Inc.
    Inventors: Chin-Hua Hu, Ching-Shun Chen, Yu-Han Chen, Yu-Sheng Lin
  • Publication number: 20240096740
    Abstract: Provided is a package structure including a first redistribution layer (RDL) structure, a die, a circuit substrate, and a first thermoelectric cooler. The RDL) structure has a first side and a second side opposite to each other. The die is disposed on the first side of the first RDL structure. The circuit substrate is bonded to the second side of the first RDL structure through a plurality of first conductive connectors. The first thermoelectric cooler is between the first RDL structure and the circuit substrate, wherein the first thermoelectric cooler includes at least a N-type doped region and at least a P-type doped region.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Wei Chiu, Chao-Wei Li, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Publication number: 20240088062
    Abstract: A package structure includes a die, an encapsulant laterally encapsulating the die, a warpage control material disposed over the die, and a protection material disposed over the encapsulant and around the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.
    Type: Application
    Filed: November 23, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Ching-Hua Hsieh, Hsiu-Jen Lin, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Jen-Jui Yu, Cheng-Shiuan Wong
  • Publication number: 20240071952
    Abstract: A method includes depositing solder paste over first contact pads of a first package component. Spring connectors of a second package component are aligned to the solder paste. The solder paste is reflowed to electrically and physically couple the spring connectors of the second package component to the first contact pads of the first package component. A device includes a first package component and a second package component electrically and physically coupled to the first package component by way of a plurality of spring coils. Each of the plurality of spring coils extends from the first package component to the second package component.
    Type: Application
    Filed: January 10, 2023
    Publication date: February 29, 2024
    Inventors: Chih-Chiang Tsao, Hsuan-Ting Kuo, Chao-Wei Chiu, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20090027620
    Abstract: A portable multimedia projection device is provided for showing the multimedia information for a plurality of audiences and promoting the sharing quality of the multimedia information. The portable multimedia projection device includes a data storage unit, an image projecting unit, a control circuit, and an independent power. The data storage unit is disposed to store a multimedia data, the image projecting unit is electrically connected to the data storage unit, and disposed to project the multimedia data, the control circuit is electrically connected to the data storage unit and the image projecting unit and disposed to control the operating, transmitting, and broadcasting of the multimedia data, and the independent power is disposed to provide the electric power the portable multimedia projection device needs to operate.
    Type: Application
    Filed: November 5, 2007
    Publication date: January 29, 2009
    Applicant: MUSTEK TECHNOLOGY CO. LTD.
    Inventors: Ching-Hua LIN, Wen-Hsing CHANG
  • Patent number: D522410
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: June 6, 2006
    Assignee: CPI Motor Co.
    Inventor: Ching-Hua Lin
  • Patent number: D522927
    Type: Grant
    Filed: January 4, 2005
    Date of Patent: June 13, 2006
    Assignee: CPI Motor Co.
    Inventor: Ching-Hua Lin
  • Patent number: D523782
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: June 27, 2006
    Assignee: CIP Motor Co.
    Inventor: Ching-Hua Lin
  • Patent number: D547700
    Type: Grant
    Filed: January 23, 2006
    Date of Patent: July 31, 2007
    Assignee: CPI Motor Co.
    Inventor: Ching Hua Lin
  • Patent number: D548140
    Type: Grant
    Filed: February 6, 2006
    Date of Patent: August 7, 2007
    Assignee: CPI Motor Co.
    Inventor: Ching Hua Lin