Abstract: In accordance with some embodiments, a package-on-package (PoP) structure includes a first semiconductor package having a first side and a second side opposing the first side, a second semiconductor package having a first side and a second side opposing the first side, and a plurality of inter-package connector coupled between the first side of the first semiconductor package and the first side of the second semiconductor package. The PoP structure further includes a first molding material on the second side of the first semiconductor package. The second side of the second semiconductor package is substantially free of the first molding material.

Abstract: A semiconductor memory device includes a substrate having a memory area and a logic circuit area thereon, a first interlayer dielectric layer on the substrate, and a second interlayer dielectric layer on the substrate. An embedded memory cell structure is disposed within the memory area between the first interlayer dielectric layer and the second interlayer dielectric layer. The second interlayer dielectric layer includes a first portion covering the embedded memory cell structure within the memory area and a second portion covering the logic circuit area. A top surface of the first portion is coplanar with a top surface of the second portion.

Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.

Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a first gate electrode disposed on the substrate and located in a first region of the semiconductor device. The semiconductor device also includes a first sidewall structure covering the first gate electrode. The semiconductor device further includes a protective layer disposed between the first gate electrode and the first sidewall structure. In addition, the semiconductor device includes a second gate electrode disposed on the substrate and located in a second region of the semiconductor device. The semiconductor device also includes a second sidewall structure covering a lateral surface of the second gate electrode.

Abstract: Methods of manufacturing a semiconductor structure are provided. One of the methods includes: receiving a substrate including a first conductive region of a first transistor and a second conductive region of a second transistor, wherein the first transistor and the second transistor have different conductive types; performing an amorphization on the first conductive region and the second conductive region; performing an implantation over the first conductive region of the first transistor; forming a contact material layer over the first conductive region and the second conductive region; performing a thermal anneal on the first conductive region and the second conductive region; and performing a laser anneal on the first conductive region and the second conductive region.

Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.

Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.

Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.

Abstract: A display apparatus with decreased thickness for displaying images includes a frame, a display panel received in the frame, a circuit module, and at least one fixing portion. The display panel displays images. The circuit module is outside of the frame, and provides signals and voltages to the display panel for driving the display module to display the images. The at least one fixing portion is used for fixing the circuit module on a surface of the frame away from the display panel. The circuit module is rotatably inserted into the at least one fixing portion.

Abstract: A display device includes a case, a display panel received in the case and a lateral cover coupled to the case. The case includes a main body, an extension body extending from the main body and a frame extending from the main body. The main body and the extension body cooperatively define an opening between the main body and the extension body. The display panel is received between the main body and the frame via the opening. The display panel has a periphery surrounded by the main body and the frame. The lateral cover covers the opening and is coupled to the main body and the extension body.

Abstract: A display device includes a front frame, a back cover, and a display panel. The front frame includes a plurality of limiting grooves. The back cover includes a plurality of positioning rods corresponding with the limiting grooves. The display panel is fixed between the front frame and the back cover. The back cover is fixed to the front frame by an engagement action between the limiting grooves and the positioning rods.

Abstract: A display apparatus adaptable to being placed in different locations includes a frame, a display panel received in the frame, at least one rotating portion rotatably connected with the frame, and a base rotatably connected to the at least one rotating portion. The at least one rotating portion is parallel with a back surface of the frame. The base can be perpendicularly located under the frame to support the display apparatus in a first placing orientation, on a table for example, or the center of the base can be swung through 180 degrees to rest substantially flush against the back of the display panel when it is desired that the display apparatus be hung from a wall for example.

Abstract: A display apparatus can be placed in different orientations. The display apparatus includes a frame, a display panel received in the frame, a casing, a fixing portion, and at least one movable leg. The casing is mounted on the frame via a fixing portion. The frame and casing are pivotal relative one another between a first display orientation and a second display orientation. The at least movable leg changes from a first position on the frame when the frame and casing are in the first display orientation to a second position to cooperate with the casing and frame to place the frame and casing in the second display orientation.

Abstract: A display apparatus with decreased thickness for displaying images includes a frame, a display panel received in the frame, a circuit module, and at least one fixing portion. The display panel displays images. The circuit module is outside of the frame, and provides signals and voltages to the display panel for driving the display module to display the images. The at least one fixing portion is used for fixing the circuit module on a surface of the frame away from the display panel. The circuit module is rotatably inserted into the at least one fixing portion.

Abstract: A device using both an indicator and a light signal receiver includes a cover, a display panel fixed on the cover, and a light guide member to fix and receive a light receiver. A first through hole is defined in the cover. The light guide member includes a main body and two fixing members arranged on the opposite sides of the main body; the two fixing members latch in the first through hole to fix the light guide member on the cover instead of the light guide member being made integral with the cover.