Patents by Inventor Ching-Huei Chen

Ching-Huei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230341458
    Abstract: A flying probe includes a test module and a processor. The test module measures a plurality of delta capacitances associated with a plurality of vias in a printed circuit board. The plurality of vias include first, second, third and fourth vias. Each different delta capacitance is measured between a different pair of the vias. The processor compares all the delta capacitances to a threshold value. In response to multiple delta capacitances associated with the first via being greater than or equal to the threshold value, the processor detects a possible via stripping issue for the first via.
    Type: Application
    Filed: April 26, 2022
    Publication date: October 26, 2023
    Inventors: Ching-Huei Chen, Bhyrav Mutnury, Chun-Lin Liao, Chi-Hsiang Hung, Pei-Ju Lin
  • Publication number: 20230171898
    Abstract: Back drilling vias of a PCB, including: identifying a particular diameter of a particular via of multiple vias of the PCB; back drilling of the particular via with a first drill bit having a first diameter, the first diameter a first percentage greater than the particular diameter of the particular via; determining whether the first diameter of the first drill bit is a threshold percentage greater than the particular diameter of the particular via; determining that the first diameter of the first drill bit is less than the threshold percentage greater than the particular diameter of the particular via, and in response: back drilling of the particular via with a second drill bit having a second diameter, the second diameter a second percentage greater than the particular diameter of the particular via, the second diameter greater than the first diameter.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: Steven Richard Ethridge, Ching-Huei Chen, Bhyrav M. Mutnury
  • Patent number: 11501896
    Abstract: An aperiodically overlapping spiral-wrapped cable shield system includes a cable having cable components such as a pair of conductors, at least one insulator surrounding the pair of conductors, and at least one drain wire. The cable also includes a cable shield that is spirally wrapped around the cable components with a varying wrap pitch that provides a plurality of overlapping cable shield portions with varying overlap areas. When signals are transmitted using the cable components in the cable, the varying overlap areas of the plurality of overlapping cable shield portions create a plurality of varying LC circuits that are configured to generate a resonance that does not exceed a signal integrity resonance threshold for a signals.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: November 15, 2022
    Assignee: Dell Products L.P.
    Inventors: Sandor Farkas, Ching-Huei Chen, Bhyrav Mutnury
  • Publication number: 20220189658
    Abstract: An aperiodically overlapping spiral-wrapped cable shield system includes a cable having cable components such as a pair of conductors, at least one insulator surrounding the pair of conductors, and at least one drain wire. The cable also includes a cable shield that is spirally wrapped around the cable components with a varying wrap pitch that provides a plurality of overlapping cable shield portions with varying overlap areas. When signals are transmitted using the cable components in the cable, the varying overlap areas of the plurality of overlapping cable shield portions create a plurality of varying LC circuits that are configured to generate a resonance that does not exceed a signal integrity resonance threshold for a signals.
    Type: Application
    Filed: December 16, 2020
    Publication date: June 16, 2022
    Inventors: Sandor Farkas, Ching-Huei Chen, Bhyrav Mutnury
  • Patent number: 10856414
    Abstract: A printed circuit board includes a circuit trace and a connector pad. The connector pad provides electrical and mechanical mounting of a connector lead of a surface mount device and provides a circuit path between the surface mount device and the circuit trace. The connector pad includes 1) a connector pad base electrically coupled to the circuit trace, and 2) a first connector pad island electrically isolated from the connector pad base. The connector pad base has a length that is substantially equal to a length of a contact portion of the connector lead.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: December 1, 2020
    Assignee: Dell Products, L.P.
    Inventors: Chun-Lin Liao, Ching-Huei Chen, Bhyrav M. Mutnury
  • Publication number: 20190281698
    Abstract: A printed circuit board includes a circuit trace and a connector pad. The connector pad provides electrical and mechanical mounting of a connector lead of a surface mount device and provides a circuit path between the surface mount device and the circuit trace. The connector pad includes 1) a connector pad base electrically coupled to the circuit trace, and 2) a first connector pad island electrically isolated from the connector pad base. The connector pad base has a length that is substantially equal to a length of a contact portion of the connector lead.
    Type: Application
    Filed: March 12, 2018
    Publication date: September 12, 2019
    Inventors: Chun-Lin Liao, Ching-Huei Chen, Bhyrav M. Mutnury
  • Patent number: 10054979
    Abstract: A circuit board assembly of an information handling system has an adjacent pair of vias that carry differential communication signal through printed circuit board (PCB) substrates. Pairs of ground vias each having a first ground via and a second ground via placed symmetrically on both sides of a virtual ground plane that passes between the adjacent pair of vias. Ground vias are placed at a substantially identical radius from a respective one of the adjacent pair of vias that is on the same side of the virtual ground plane. First ground via(s) are annularly spaced substantially equally from each other and from a pair of reference points on the virtual ground plane that are each radially spaced from both of the adjacent pair of vias by the substantially identical radius. The second ground via(s) are annularly spaced from each other and the pair of reference points.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: August 21, 2018
    Assignee: Dell Products, L.P.
    Inventors: Chun-Lin Liao, Ching Huei Chen, Bhyrav M. Mutnury, Siang Chen
  • Publication number: 20180132344
    Abstract: A printed circuit board includes a core layer having a thickness (H) and a microstrip trace pair on a top surface of the core layer. The microstrip trace pair communicates serial data at a data transfer rate. A separation (S1) between a first trace of the microstrip trace pair and a second trace of the microstrip trace pair is defined as S1=XH, where X is less than or equal to 5. The data transfer rate is greater than or equal to 16 gigabits per second (Gbps).
    Type: Application
    Filed: November 9, 2016
    Publication date: May 10, 2018
    Inventors: Chun-Lin Liao, Ching-Huei Chen, Bhyrav M. Mutnury, Chi- Hsuan Cheng
  • Patent number: D379836
    Type: Grant
    Filed: April 2, 1996
    Date of Patent: June 10, 1997
    Inventor: Ching-Huei Chen