Abstract: The present disclosure relates to an integrated chip structure. The integrated chip structure includes a dielectric stack disposed on a substrate. The integrated chip structure further includes one or more piezoelectric ultrasonic transducers (PMUTs) and one or more capacitive ultrasonic transducers (CMUTs). The one or more PMUTs include a piezoelectric stack disposed within the dielectric stack over one or more PMUT cavities. The one or more CMUTs include electrodes disposed within the dielectric stack and separated by one or more CMUT cavities. An isolation chamber is arranged within the dielectric stack laterally between the one or more PMUTs and the one or more CMUTs. The isolation chamber vertically extends past at least a part of both the one or more PMUTs and the one or more CMUTs.

Abstract: A bioFET device includes a semiconductor substrate having a first surface and an opposite, parallel second surface and a plurality of bioFET sensors on the semiconductor substrate. Each of the bioFET sensors includes a gate formed on the first surface of the semiconductor substrate and a channel region formed within the semiconductor substrate beneath the gate and between source/drain (S/D) regions in the semiconductor substrate. The channel region includes a portion of the second surface of the semiconductor substrate. An isolation layer is disposed on the second surface of the semiconductor substrate. The isolation layer has an opening positioned over the channel region of more than one bioFET sensor of the plurality of bioFET sensors. An interface layer is disposed on the channel region of the more than one bioFET sensor in the opening.

Abstract: The structure of a semiconductor device with an array of bioFET sensors, a biometric fingerprint sensor, and a temperature sensor and a method of fabricating the semiconductor device are disclosed. A method for fabricating the semiconductor device includes forming a gate electrode on a first side of a semiconductor substrate, forming a channel region between source and drain regions within the semiconductor substrate, and forming a piezoelectric sensor region on a second side of the semiconductor substrate. The second side is substantially parallel and opposite to the first side. The method further includes forming a temperature sensing electrode on the second side during the forming of the piezoelectric sensor region, forming a sensing well on the channel region, and binding capture reagents on the sensing well.

Abstract: In some embodiments, a piezoelectric biosensor is provided. The piezoelectric biosensor includes a semiconductor substrate. A first electrode is disposed over the semiconductor substrate. A piezoelectric structure is disposed on the first electrode. A second electrode is disposed on the piezoelectric structure. A sensing reservoir is disposed over the piezoelectric structure and exposed to an ambient environment, where the sensing reservoir is configured to collect a fluid comprising a number of bio-entities.

Abstract: Various embodiments of the present disclosure are directed to a normally-open piezoelectric microelectromechanical systems (MEMS) device. A cantilever has a first end overlying and bonded to a substrate and further has a second end, opposite the first end, overlying an actuator cavity. A piezoelectric actuator is on the cantilever. A valve vane is bonded to the second end of the cantilever and further overlies a valve cavity laterally adjacent to the actuator cavity. The cantilever curves downward from the first end to the second end, such that the valve vane is inclined and the valve cavity is open. Actuation of the piezoelectric actuator curves the cantilever upward to close the valve cavity.

Abstract: A sensor array includes a semiconductor substrate, a first plurality of FET sensors and a second plurality of FET sensors. Each of the FET sensors includes a channel region between a source and a drain region in the semiconductor substrate and underlying a gate structure disposed on a first side of the channel region, and a dielectric layer disposed on a second side of the channel region opposite from the first side of the channel region. A first plurality of capture reagents is coupled to the dielectric layer over the channel region of the first plurality of FET sensors, and a second plurality of capture reagents is coupled to the dielectric layer over the channel region of the second plurality of FET sensors. The second plurality of capture reagents is different from the first plurality of capture reagents.

Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.

Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.

Abstract: One aspect of the present disclosure pertains to a device. The device includes a substrate, a logic circuit disposed on the substrate, and a nanoelectromechanical systems (NEMS) device electrically connected to the logic circuit and formed on the substrate. The NEMS device includes a first electrode electrically connected to the logic circuit, a second electrode electrically connected to a first power supply, a movable feature electrically connected to the second electrode, and a control electrode operable to move the movable feature relative to the first electrode.

Abstract: A piezoelectric valve may be formed using semiconductor processing techniques such that the piezoelectric valve is biased in a normally closed configuration. Actuation of the piezoelectric valve may be achieved through the use of a piezoelectric-based actuation layer of the piezoelectric valve. The piezoelectric valve may be implemented in various use cases, such as a dispensing valve for precise drug delivery, a relief valve to reduce the occlusion effect in speaker-based devices (e.g., in-ear headphones), a pressure control valve, and/or another type of valve that is configured for microfluidic control, among other examples. The normally closed configuration of the piezoelectric valve enables the piezoelectric valve to operate as a normally closed valve with reduced power consumption.

Abstract: A sensor array includes a semiconductor substrate, a first plurality of FET sensors and a second plurality of FET sensors. Each of the FET sensors includes a channel region between a source and a drain region in the semiconductor substrate and underlying a gate structure disposed on a first side of the channel region, and a dielectric layer disposed on a second side of the channel region opposite from the first side of the channel region. A first plurality of capture reagents is coupled to the dielectric layer over the channel region of the first plurality of FET sensors, and a second plurality of capture reagents is coupled to the dielectric layer over the channel region of the second plurality of FET sensors. The second plurality of capture reagents is different from the first plurality of capture reagents.

Abstract: Various embodiments of the present disclosure are directed towards a piezoelectric device including a piezoelectric structure over a substrate. A first conductive structure is disposed on a lower surface of the piezoelectric structure. The first conductive structure includes one or more first movable elements directly contacting the piezoelectric structure. A second conductive structure is disposed on an upper surface of the piezoelectric structure. The second conductive structure includes one or more second movable elements directly contacting the piezoelectric structure. The one or more second movable elements directly overlie the one or more first movable elements.

Abstract: The present invention provides a control method of the flash memory controller. In the control method, after receiving a deallocate command from a host device, the flash memory controller will update a valid page count table, a detailed valid page count table and/or a zone valid page count table according to deallocate command, for the flash memory controller to efficiently and quickly determine if any one of the zones does not have any valid data, so that the flash memory controller can recommend the host device to send a reset command to reset the zone.

Abstract: The structure of a semiconductor device with an array of bioFET sensors, a biometric fingerprint sensor, and a temperature sensor and a method of fabricating the semiconductor device are disclosed. A method for fabricating the semiconductor device includes forming a gate electrode on a first side of a semiconductor substrate, forming a channel region between source and drain regions within the semiconductor substrate, and forming a piezoelectric sensor region on a second side of the semiconductor substrate. The second side is substantially parallel and opposite to the first side. The method further includes forming a temperature sensing electrode on the second side during the forming of the piezoelectric sensor region, forming a sensing well on the channel region, and binding capture reagents on the sensing well.

Abstract: In some embodiments, a piezoelectric biosensor is provided. The piezoelectric biosensor includes a semiconductor substrate. A first electrode is disposed over the semiconductor substrate. A piezoelectric structure is disposed on the first electrode. A second electrode is disposed on the piezoelectric structure. A sensing reservoir is disposed over the piezoelectric structure and exposed to an ambient environment, where the sensing reservoir is configured to collect a fluid comprising a number of bio-entities.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a first conductive structure and a second conductive structure. A dielectric structure is arranged between the first conductive structure and the second conductive structure. The dielectric structure comprises an upper region over a lower region. The lower region comprises a first lateral surface and a second lateral surface on opposing sides of the upper region. A passivation layer overlies the second conductive structure and the dielectric structure. The passivation layer comprises a lateral segment contacting the first lateral surface. A height of the lateral segment is greater than a height of the upper region. A top surface of the lateral segment is below a top surface of the passivation layer.

Abstract: In some embodiments, a piezoelectric biosensor is provided. The piezoelectric biosensor includes a semiconductor substrate. A first electrode is disposed over the semiconductor substrate. A piezoelectric structure is disposed on the first electrode. A second electrode is disposed on the piezoelectric structure. A sensing reservoir is disposed over the piezoelectric structure and exposed to an ambient environment, where the sensing reservoir is configured to collect a fluid comprising a number of bio-entities.

Abstract: The present invention provides a control method of a flash memory controller, wherein the flash memory controller is configured to access a flash memory module, and the control method includes the steps of: receiving a settling command from a host device to configure a portion space of the flash memory module as a zoned namespace; receiving a write command from the host device to write data corresponding a first zone into a plurality of blocks of the flash memory module, wherein an access mode chose by the flash memory controller is determined based on a size of each zone and a size of each block.